Abstract: An apparatus for providing operation logic of a fuel cell system may include an activation part configured to perform activation on a fuel cell, and an operating performance part configured to perform constant current operation according to the performing of activation.

Abstract: Disclosed is a method of fuel cell analysis. The method includes measuring at least a portion of an electrode of a fuel cell to determine a measured result. The method also includes analyzing a state of the fuel cell according to the measured result.

Abstract: A pixel includes: a storage capacitor connected between a first power supply voltage and a gate node; a first transistor including a gate electrode connected to the gate node; a second transistor to transfer a data signal to a source of the first transistor in response to a scan signal; a third transistor to diode-connect the first transistor in response to the scan signal, and including first and second sub-transistors serially connected between the gate node and a drain of the first transistor; a fourth transistor to transfer an initialization voltage to the gate node in response to an initialization signal, and including third and fourth sub-transistors serially connected between the gate node and the initialization voltage; and an organic light emitting diode including a cathode connected to a second power supply voltage. At least one of the second and fourth sub-transistors includes a bottom electrode.

Abstract: A circuit board includes a first body part, a second body part and a connection part. The first body part includes a first contact surface and has a multi-layered structure. The second body part includes a second contact surface, has a multi-layered structure, and includes a first signal line spaced apart from the second contact surface. The connection part includes a third contact surface between the first contact surface and the second contact surface, and connects the first body part and the second body part to each other.

Abstract: A display device includes a display area including gate lines; a plurality of gate drivers disposed in a non-display area that is adjacent to the display area and connected to the gate lines; and a driving power transmitting line disposed in the non-display area and providing a driving power to the gate drivers. The driving power transmitting line includes a first driving power transmitting line and a second driving power transmitting line overlapping each other with an insulating layer disposed therebetween, the first driving power transmitting line and the second driving power transmitting line are connected with each other through a plurality of contact holes formed in the insulating layer, and the contact holes are disposed in a plurality of regions respectively overlapping the gate drivers in a direction parallel to an extending direction of the gate lines.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-line among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line.

Abstract: A display device includes a display area including gate lines; a plurality of gate drivers disposed in a non-display area that is adjacent to the display area and connected to the gate lines; and a driving power transmitting line disposed in the non-display area and providing a driving power to the gate drivers. The driving power transmitting line includes a first driving power transmitting line and a second driving power transmitting line overlapping each other with an insulating layer disposed therebetween, the first driving power transmitting line and the second driving power transmitting line are connected with each other through a plurality of contact holes formed in the insulating layer, and the contact holes are disposed in a plurality of regions respectively overlapping the gate drivers in a direction parallel to an extending direction of the gate lines.

Abstract: A display device includes a display panel including a plurality of pixels, a controller configured to output image data and a gated clock signal, the image data including a plurality of pixel data for the plurality of pixels, and a data driver configured to receive the image data and the gated clock signal from the controller, and to sample the image data in response to the gated clock signal. The controller detects a repeated data pattern where same pixel data is repeated in the image data, generates a clock enable signal having an off level in a period in which the repeated data pattern is transferred, and gates an input clock signal in response to the clock enable signal to produce the gated clock signal.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-fine among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line,

Abstract: A circuit board for a display device includes: a signal line to transmit signal, a first metallic layer overlapping the signal line, a first conductive layer spaced apart from the first metallic layer, a base layer insulating the signal line from the first metallic layer and from the first conductive layer, and a first capacitor including a first terminal electrically coupled to the first metallic layer and a second terminal electrically coupled to the first conductive layer.

Abstract: A display device includes: a panel including a display region and a touch region; and a circuit board, and including a first conductive layer, a second conductive layer and a first insulating layer between the first conductive layer and the second conductive layer. The circuit board includes: a plurality of data lines electrically connected with a plurality of data signal lines; a plurality of touch lines electrically connected with a plurality of touch electrodes; and a first ground line disposed between at least two or more of the plurality of data lines and the plurality of touch lines. The first ground line includes a first part of the first conductive layer, a first part of the second conductive layer, and a first via passing through the first insulating layer and connecting the first part of the first conductive layer with the first part of the second conductive layer.

Abstract: A display device includes a display panel including a plurality of pixels, a controller configured to output image data and a gated clock signal, the image data including a plurality of pixel data for the plurality of pixels, and a data driver configured to receive the image data and the gated clock signal from the controller, and to sample the image data in response to the gated clock signal. The controller detects a repeated data pattern where same pixel data is repeated in the image data, generates a clock enable signal having an off level in a period in which the repeated data pattern is transferred, and gates an input clock signal in response to the clock enable signal to produce the gated clock signal.

Abstract: An input sensing device including: a power line; driving lines; a first signal line including sub-lines; a second signal line connected to the sub-lines; and sensor pixels connected to the power line, the driving lines, and the first signal line, wherein at least one sensor pixel of the sensor pixels includes: an optical sensor that transfers a photoelectrically converted charge from the power line to a first node in response to a driving signal provided through a first driving line of the driving lines; a first transistor connected between the first node and a first sub-line among the sub-lines, wherein the first transistor includes a gate electrode connected to the first driving line; and a second transistor connected between the first node and a second sub-line among the sub-lines, wherein the second transistor includes a gate electrode connected to the first driving line.

Abstract: A display device includes: a panel including a display region and a touch region; and a circuit board, and including a first conductive layer, a second conductive layer and a first insulating layer between the first conductive layer and the second conductive layer. The circuit board includes: a plurality of data lines electrically connected with a plurality of data signal lines; a plurality of touch lines electrically connected with a plurality of touch electrodes; and a first ground line disposed between at least two or more of the plurality of data lines and the plurality of touch lines. The first ground line includes a first part of the first conductive layer, a first part of the second conductive layer, and a first via passing through the first insulating layer and connecting the first part of the first conductive layer with the first part of the second conductive layer.

Abstract: A display device includes: a substrate including a display region including a plurality of pixel regions, and a non-display region at a periphery of the display region; a pixel circuit layer including a plurality of circuit elements in the display region; a display element layer including a plurality of light emitting devices in the display region on the pixel circuit layer; and first and second alignment lines in the non-display region, the first and second alignment lines each having a multi-layered structure. Each of the first and second alignment lines includes: a main line in a same layer as at least one electrode in the display element layer; and at least one sub-line electrically connected to the main line, the at least one sub-line in a same layer as at least one electrode in the pixel circuit layer.

Abstract: A display device includes a display unit displaying an image, a fingerprint sensing unit disposed on one surface of the display unit and including fingerprint sensing pixels to sense a fingerprint, and a readout circuit providing a selection signal to the fingerprint sensing unit to select a predetermined amount of fingerprint sensing pixels from the fingerprint sensing pixels as a sensing area and receiving a fingerprint sensing signal from the sensing area. The readout circuit accumulates the fingerprint sensing signal provided from the fingerprint sensing pixels in the sensing area during a test mode and calculates a compensation value based on a difference between the accumulated fingerprint sensing signal and a reference value.

Abstract: A display device includes: a display panel; an input sensor disposed on the display panel; a flexible circuit board connected to the display panel and the input sensor; a first differential signal line and a second differential signal line, which are disposed on the flexible circuit board and connected to the display panel; and a transmission line and a receiving line, which are disposed on the flexible circuit board and connected to the input sensor. In a plan view, the receiving line is disposed between the first differential signal line and the second differential signal line.

Abstract: A circuit board for a display device includes: a signal line to transmit signal, a first metallic layer overlapping the signal line, a first conductive layer spaced apart from the first metallic layer, a base layer insulating the signal line from the first metallic layer and from the first conductive layer, and a first capacitor including a first terminal electrically coupled to the first metallic layer and a second terminal electrically coupled to the first conductive layer.

Abstract: A display device includes a substrate including a display area having a plurality of pixel areas and a non-display area located around the display area; a circuit element layer including a circuit element in each of the pixel areas and a reference voltage wiring in the non-display area, the reference voltage wiring being electrically coupled to the circuit element; and a display element layer including a first pixel electrode on the circuit element layer in each of the pixel areas, a second pixel electrode located opposite to the first pixel electrode, a plurality of light emitting elements between the first pixel electrode and the second pixel electrode, and a first wiring on the circuit element layer in the non-display area, wherein the first wiring is directly coupled to the reference voltage wiring in the non-display area.

Abstract: A display device includes: a display panel; an input sensor disposed on the display panel; a flexible circuit board connected to the display panel and the input sensor; a first differential signal line and a second differential signal line, which are disposed on the flexible circuit board and connected to the display panel; and a transmission line and a receiving line, which are disposed on the flexible circuit board and connected to the input sensor. In a plan view, the receiving line is disposed between the first differential signal line and the second differential signal line.