Abstract: An apparatus for relieving the standby current fail of a memory device which completely relieves a memory device by suppressing the increasing standby current consumption when the standby current is failed by stress during or after fabricating process without any change of standby conditions in a memory device having NAND-type cell array structure, and by using the other data correcting way. By connecting the transistors for the ground string selecting operation in series to the string transistors in order to selectively form the electrical path between the transistor connected to the word line and the ground node, even though the breakdown of the NAND cell occurs, the standby current fail can be prevented by selectively turning on or off the current path in response to the address decoding signal.