Abstract: Disclosed are systems, devices and methodologies for debonding wafers from carrier plates. In certain wafer processing operations, it is desirable to temporarily mount a wafer on a carrier plate for support and ease of handling. Such a mounting can be achieved by bonding the wafer and the carrier plate with an adhesive. Once such operations are completed, the wafer needs to be debonded from the carrier plate. Such a debonding process can be achieved by applying a suction force to the wafer-carrier plate assembly. Various debonding systems, devices and methodologies, and related features, are disclosed.

Abstract: Disclosed are systems, devices and methodologies for debonding wafers from carrier plates. In certain wafer processing operations, it is desirable to temporarily mount a wafer on a carrier plate for support and ease of handling. Such a mounting can be achieved by bonding the wafer and the carrier plate with an adhesive. Once such operations are completed, the wafer needs to be debonded from the carrier plate. Such a debonding process can be achieved by applying a suction force to the wafer-carrier plate assembly. Various debonding systems, devices and methodologies, and related features, are disclosed.

Abstract: The incorporation of an aluminum arsenide (AlAs) buffer layer in a gallium arsenide (GaAs) field effect transistor (FET) structure is found to improve the overall device performance, particularly in the high temperature operating regime. Similar characteristics may be obtained from devices fabricated with an Al.sub.x Ga.sub.1-x As 0.2.ltoreq.x.ltoreq.1 barrier layer. At temperatures greater than 250.degree. C., the semi-insulating gallium arsenide substrate begins to conduct significant amounts of current. The highly resistive AlAs buffer layer limits this increased conduction, thus permitting device operation at temperatures where parasitic leakage currents would impede or prevent device operation. Devices fabricated with AlAs buffer layers exhibited lower drain parasitic leakage currents and showed improved output conductance characteristics at 350.degree. C. ambient temperature.

Abstract: The incorporation of an aluminum arsenide (AlAs) buffer layer in a gallium arsenide (GaAs) field effect transistor (FET) structure is found to improve the overall device performance, particularly in the high temperature operating regime. Similar characteristics may be obtained from devices fabricated with an Al.sub.x Ga.sub.1-x As (0.2.ltoreq.x.ltoreq.1) barrier layer. At temperatures greater than 250.degree. C., the semi-insulating gallium arsenide substrate begins to conduct significant amounts of current. The highly resistive AlAs buffer layer limits this increased conduction, thus permitting device operation at temperatures where parasitic leakage currents would impede or prevent device operation. Devices fabricated with AlAs buffer layers exhibited lower drain parasitic leakage currents and showed improved output conductance characteristics at 350.degree. C. ambient temperature.