Patents by Inventor Hyoun Mi YU

Hyoun Mi YU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bit line sense amplifier and layout method therefor
    Patent number: 8964497
    Abstract: A bit line sense amplifier and a layout method therefor which can reduce coupling capacitance. The bit line sense amplifier is disposed between a first memory cell block and a second memory cell block adjacent to the first memory cell block and configured to include first and third switching elements substantially symmetrically formed in a first direction so that the drain terminals of the first and third switching elements face each other, second and fourth switching elements substantially symmetrically formed in the first direction so that the drain terminals of the second and fourth switching elements face each other, a first line configured to electrically couple the gate terminal of the first switching element and the drain terminal of the second switching element, and a second line configured to electrically couple the gate terminal of the third switching element and the drain terminal of the fourth switching element.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 24, 2015
    Assignee: SK Hynix Inc.
    Inventor: Hyoun Mi Yu
  • BIT LINE SENSE AMPLIFIER AND LAYOUT METHOD THEREFOR
    Publication number: 20140050040
    Abstract: A bit line sense amplifier and a layout method therefor which can reduce coupling capacitance. The bit line sense amplifier is disposed between a first memory cell block and a second memory cell block adjacent to the first memory cell block and configured to include first and third switching elements substantially symmetrically formed in a first direction so that the drain terminals of the first and third switching elements face each other, second and fourth switching elements substantially symmetrically formed in the first direction so that the drain terminals of the second and fourth switching elements face each other, a first line configured to electrically couple the gate terminal of the first switching element and the drain terminal of the second switching element, and a second line configured to electrically couple the gate terminal of the third switching element and the drain terminal of the fourth switching element.
    Type: Application
    Filed: December 19, 2012
    Publication date: February 20, 2014
    Applicant: SK hynix Inc.
    Inventor: Hyoun Mi YU