Abstract: A method of manufacturing a graphene-tin oxide nanocomposite comprises dispersing graphene and tin oxide in an organic solvent to prepare a dispersion solution, drying the dispersion solution to obtain a powdery mixture, and irradiating the mixture with microwaves to obtain a graphene-tin oxide nanocomposite. Irradiation of graphene and tin oxide with microwaves results in the simplification of the manufacturing process of graphene-tin oxide nanocomposites and a decrease in manufacturing time and cost, and produce graphene-tin oxide nanocomposites at low temperatures. Further, the graphene-tin oxide nanocomposite with improved sensitivity to NO2 gas may be produced.

Abstract: A method of manufacturing a graphene-tin oxide nanocomposite comprises dispersing graphene and tin oxide in an organic solvent to prepare a dispersion solution, drying the dispersion solution to obtain a powdery mixture, and irradiating the mixture with microwaves to obtain a graphene-tin oxide nanocomposite. Irradiation of graphene and tin oxide with microwaves results in the simplification of the manufacturing process of graphene-tin oxide nanocomposites and a decrease in manufacturing time and cost, and produce graphene-tin oxide nanocomposites at low temperatures. Further, the graphene-tin oxide nanocomposite with improved sensitivity to NO2 gas may be produced.

Abstract: A photosensitive resin composition according to an example embodiment of the present disclosure includes a quantum dot, a photopolymerizable compound, a photopolymerization initiator, an alkali-soluble resin, and a solvent, wherein the alkali-soluble resin includes at least one of a monomer represented by Formula 1 and a monomer represented by Formula 2:

Abstract: A photosensitive resin composition according to an example embodiment of the present disclosure includes a quantum dot, a photopolymerizable compound, a photopolymerization initiator, an alkali-soluble resin, and a solvent, wherein the alkali-soluble resin includes at least one of a monomer represented by Formula 1 and a monomer represented by Formula 2:

Abstract: A power supplying unit for a liquid crystal display device includes: a power integrated circuit for generating a source voltage and a compensation voltage, the compensation voltage linearly varying according to an ambient temperature; and a charge pumping part for generating a gate high voltage using the source voltage and the compensation voltage, the gate high voltage linearly varying when the ambient temperature is lower than a reference temperature.

Abstract: A power supplying unit for a liquid crystal display device includes: a power integrated circuit for generating a source voltage and a compensation voltage, the compensation voltage linearly varying according to an ambient temperature; and a charge pumping part for generating a gate high voltage using the source voltage and the compensation voltage, the gate high voltage linearly varying when the ambient temperature is lower than a reference temperature.

Abstract: A method of etching a platinum group metal film uses a gas mixture containing argon (Ar), oxygen (O2) and halogen gases and a method of forming a lower electrode of a capacitor uses the etching method. The gas mixture contains O2, Ar, and a third component, preferably a halogen, e.g., chlorine (Cl2) or hydrogen bromide (HBr). In the method of forming a lower electrode, a conductive film containing a metal belonging to a platinum (Pt) group is formed on a semiconductor substrate, a hard mask partially exposing the conductive film is then formed on the conductive film. Then, the exposed conductive film is dry-etched using the hard mask as an etching mask and a three-component gas mixture containing argon (Ar) and oxygen (O2), to form a conductive film pattern beneath the hard mask, and the hard mask is then removed.

Abstract: A method for etching a platinum (Pt) layer of a semiconductor device is provided which improves the etching slope of a sidewall of the platinum layer used as a storage node of the semiconductor device. The semiconductor device consists of a semiconductor substrate including a bottom layer on which various other layers are formed. Specifically, according to this invention, a Pt layer is formed on a bottom layer of a semiconductor substrate. An adhesive layer is then formed on the Pt layer while a mask layer is formed on the adhesive layer. After formation of the various layers, the mask layer and adhesive layer are patterned using an etching process to form a mask pattern and an adhesive layer mask pattern, respectively. The semiconductor substrate is then heated and an etching process is performned on the Pt layer using the mask pattern and the adhesive layer mask pattern to form etching slope sidewalls of the Pt layer having etching slopes close to vertical.