Abstract: A time-to-digital converter includes low and high resolution time-to-digital converters for providing both high resolution and wide measurement range. The low resolution time-to-digital converter measures a time difference between first and second signals with a first quantization step. The high resolution time-to-digital converter measures the time difference between the first and second signals with a second quantization step that is smaller than the first quantization step. The low resolution time-to-digital converter has a wider measurement range than the high resolution time-to-digital converter.

Abstract: A time-to-digital converter includes a first delay line, a second delay line, comparators, and an encoder. The first delay line includes first resistors coupled in series and receives a first signal through a start node. The second delay line includes second resistors coupled in series and receives a second signal through a node corresponding to an end node of the first delay line. The comparators compare first voltages of nodes on the first delay line with second voltages of corresponding nodes on the second delay line. The encoder generates a digital code based on outputs of the comparators. Therefore, the time-to-digital converter may decrease a chip size thereof and lower power consumption, and the time-to-digital converter may increase a range of a maximum delay time between two signals.

Abstract: A time-to-digital converter includes a first delay line, a second delay line, comparators, and an encoder. The first delay line includes first resistors coupled in series and receives a first signal through a start node. The second delay line includes second resistors coupled in series and receives a second signal through a node corresponding to an end node of the first delay line. The comparators compare first voltages of nodes on the first delay line with second voltages of corresponding nodes on the second delay line. The encoder generates a digital code based on outputs of the comparators. Therefore, the time-to-digital converter may decrease a chip size thereof and lower power consumption, and the time-to-digital converter may increase a range of a maximum delay time between two signals.

Abstract: A time-to-digital converter includes low and high resolution time-to-digital converters for providing both high resolution and wide measurement range. The low resolution time-to-digital converter measures a time difference between first and second signals with a first quantization step. The high resolution time-to-digital converter measures the time difference between the first and second signals with a second quantization step that is smaller than the first quantization step.

Abstract: A quadrature VCO comprises: a first delay cell including a first differential VCO coupled between a power supply and a first current source; and first and second coupling transistors that each include a first terminal, a second terminal coupled to the power supply, and a third terminal, and that vary a current flowing from the second terminal to the third terminal according to quadrature-phase signals applied to the first terminal; and a second delay cell including a second differential VCO coupled between a power supply and a second current source; and third and fourth coupling transistors that each include a first terminal, a second terminal coupled to the power, and a third terminal, and that vary a current flowing from the second terminal to the third terminal according to in-phase signals applied to the first terminal.

Abstract: A method of and system for drying a wafer offer a short cycle of operation, and minimize the amount of time that the wafer is exposed to external air. The drying system includes a process bath, a loader for transferring the wafer from a wash bath to an elevator of the process bath, an unloading stage for supporting the wafer after it is dried, and a lid for drying the wafer after it is rinsed in the process bath and for transferring the wafer onto the unloading stage. The lid includes a lid body defining a cavity, a wafer holder disposed within the cavity, a gas distributer having gas injection holes facing the cavity, and a driving mechanism for moving the lid between the process bath and the unloading stage. In the drying method, the lid is positioned over the process bath after the wafer has been rinsed. The elevator of the process bath is then raised to move the rinsed wafer above the tub of the process bath and into the cavity defined in the lid body.

Abstract: A method of and system for drying a wafer offer a short cycle of operation, and minimize the amount of time that the wafer is exposed to external air. The drying system includes a process bath, a loader for transferring the wafer from a wash bath to an elevator of the process bath, an unloading stage for supporting the wafer after it is dried, and a lid for drying the wafer after it is rinsed in the process bath and for transferring the wafer onto the unloading stage. The lid includes a lid body defining a cavity, a wafer holder disposed within the cavity, a gas distributer having gas injection holes facing the cavity, and a driving mechanism for moving the lid between the process bath and the unloading stage. In the drying method, the lid is positioned over the process bath after the wafer has been rinsed. The elevator of the process bath is then raised to move the rinsed wafer above the tub of the process bath and into the cavity defined in the lid body.