Patents by Inventor Hyoung-hee Kim
Hyoung-hee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240074965Abstract: The present disclosure relates to an ultraviolet light-blocking composition containing a centipede grass extract and a cosmetic composition and, more specifically, to an ultraviolet light-blocking composition comprising a centipede grass (Eremochloa ophiuroides) leaf extract as an active ingredient; and a cosmetic composition containing the ultraviolet light-blocking composition.Type: ApplicationFiled: January 6, 2022Publication date: March 7, 2024Applicant: KOREA ATOMIC ENERGY REREARCH INSTITUTEInventors: Byung-Yeoup CHUNG, Hyoung-Woo BAI, Seong-Hee KANG, Sung-Beom LEE, Seung-Sik LEE, Tae-Hoon KIM, Mi-Yeon KIM
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Patent number: 11923145Abstract: A multilayer capacitor includes a body including a multilayer structure in which a plurality of dielectric layers are stacked in a first direction and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and external electrodes formed outside the body and connected to the internal electrodes. The body includes an active portion and a side margin portion covering the active portion and opposing each other in a second direction, and 1<A2/M1?1.5 and A2<A1 in which A1 is an average grain size of the dielectric layers in a central region of the active portion, A2 is an average grain size of the dielectric layers at an active boundary part of the active portion adjacent to the side margin portion, and M1 is an average grain size of the dielectric layers in a central region of the side margin portion.Type: GrantFiled: September 2, 2021Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Je Hee Lee, Seung In Baik, Ji Su Hong, Eun Ha Jang, Hyoung Uk Kim, Jae Sung Park
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Patent number: 9437452Abstract: A method of forming a fine pattern includes forming a phase separation guide layer on a substrate, forming a neutral layer on the phase separation guide layer, forming a first pattern including first openings on the neutral layer, forming a second pattern including second openings each having a smaller width than each of the first openings, forming a neutral pattern including guide patterns exposing a portion of the phase separation guide layer by etching an exposed portion of the neutral layer by using the second pattern as an etch mask, removing the second pattern to expose a top surface of the neutral pattern, forming a material layer including a block copolymer on the neutral pattern and the phase separation guide layer exposed through the guide patterns, and forming a fine pattern layer including a first block and a second block on the neutral pattern and the phase separation guide layer.Type: GrantFiled: January 23, 2015Date of Patent: September 6, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-ju Park, Hyoung-hee Kim, Kyoung-mi Kim, Se-kyung Baek, Soo-jin Lee, Jae-ho Kim, Jung-sik Choi
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Publication number: 20150243525Abstract: A method of forming a fine pattern includes forming a phase separation guide layer on a substrate, forming a neutral layer on the phase separation guide layer, forming a first pattern including first openings on the neutral layer, forming a second pattern including second openings each having a smaller width than each of the first openings, forming a neutral pattern including guide patterns exposing a portion of the phase separation guide layer by etching an exposed portion of the neutral layer by using the second pattern as an etch mask, removing the second pattern to expose a top surface of the neutral pattern, forming a material layer including a block copolymer on the neutral pattern and the phase separation guide layer exposed through the guide patterns, and forming a fine pattern layer including a first block and a second block on the neutral pattern and the phase separation guide layer.Type: ApplicationFiled: January 23, 2015Publication date: August 27, 2015Inventors: Jeong-ju PARK, Hyoung-hee KIM, Kyoung-mi KIM, Se-kyung BAEK, Soo-jin LEE, Jae-ho KIM, Jung-sik CHOI
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Patent number: 8623739Abstract: A method of manufacturing a semiconductor device includes forming a resist pattern on a first region on a substrate, bringing a descum solution including an acid source into contact with the resist pattern and with a second region of the substrate, decomposing resist residues remaining on the second region of the substrate by using acid obtained from the acid source in the descum solution and removing the decomposed resist residues and the descum solution from the substrate.Type: GrantFiled: July 19, 2011Date of Patent: January 7, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung-rae Lee, Yool Kang, Kyung-hwan Yoon, Hyoung-hee Kim, So-ra Han, Tae-hoi Park
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Publication number: 20130034965Abstract: In a method of fabricating patterns in an integrated circuit device, first mask patterns, sacrificial patterns, and second mask patterns are formed on a target layer such that the sacrificial patterns are provided between sidewalls of adjacent ones of the first and second mask patterns. The sacrificial patterns between the sidewalls of the adjacent ones of the first and second mask patterns are selectively removed using a dry etch-back process, and the target layer is patterned using the first and second mask patterns as a mask.Type: ApplicationFiled: August 1, 2012Publication date: February 7, 2013Inventors: Hyoung-Hee KIM, Yool Kang, Song-Se Yi, Young-Ho Kim, Jae-Ho Kim
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Patent number: 8227349Abstract: A method of forming a mask pattern, a method of forming a minute pattern, and a method of manufacturing a semiconductor device using the same, the method of forming the mask pattern including forming first mask patterns on a substrate; forming first preliminary capping layers on the first mask patterns; irradiating energy to the first preliminary capping patterns to form second preliminary capping layers ionically bonded with the first mask patterns; applying an acid to the second preliminary capping layers to form capping layers; forming a second mask layer between the capping layers, the second mask layer having a solubility lower than that of the capping layers; and removing the capping layers to form second mask patterns.Type: GrantFiled: September 1, 2010Date of Patent: July 24, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyoung-Hee Kim, Yool Kang, Seong-Ho Moon, Seok-Hwan Oh, So-Ra Han, Seong-Woon Choi
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Patent number: 8173358Abstract: A method of forming fine patterns of a semiconductor device includes forming a plurality of first mask patterns on a substrate such that the plurality of first mask patterns are separated from one another by a space located therebetween, in a direction parallel to a main surface of the substrate, forming a plurality of capping films formed of a first material having a first solubility in a solvent on sidewalls and a top surface of the plurality of first mask patterns. The method further includes forming a second mask layer formed of a second material having a second solubility in the solvent, which is less than the first solubility, so as to fill the space located between the plurality of first mask patterns, and forming a plurality of second mask patterns corresponding to residual portions of the second mask layer which remain in the space located between the plurality of first mask patterns, after removing the plurality of capping films and a portion of the second mask layer using the solvent.Type: GrantFiled: April 29, 2009Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyoung-hee Kim, Yool Kang, Seong-woon Choi, Jin-young Yoon
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Publication number: 20120028434Abstract: A method of manufacturing a semiconductor device includes forming a resist pattern on a first region on a substrate, bringing a descum solution including an acid source into contact with the resist pattern and with a second region of the substrate, decomposing resist residues remaining on the second region of the substrate by using acid obtained from the acid source in the descum solution and removing the decomposed resist residues and the descum solution from the substrate.Type: ApplicationFiled: July 19, 2011Publication date: February 2, 2012Inventors: Hyung-rae LEE, Yool Kang, Kyung-hwan Yoon, Hyoung-hee Kim, So-ra Han, Tae-hoi Park
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Publication number: 20110244689Abstract: A method of manufacturing a semiconductor device includes forming a first mask pattern on a substrate by using a material including a polymer having a protection group de-protectable by an acid, the first mask pattern having a plurality of holes; forming a capping layer on an exposed surface of the first mask pattern, the capping layer including an acid source; diffusing the acid source into the first mask pattern so that the protection group becomes de-protectable from the polymer in the first mask pattern; forming a second mask layer on the capping layer, the second mask layer separate from the first mask pattern and filling the plurality of holes in the first mask pattern; and forming a plurality of second mask patterns in the plurality of holes by removing the capping layer and the first mask pattern.Type: ApplicationFiled: March 31, 2011Publication date: October 6, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: So-ra Han, Yool Kang, Seong-ho Moon, Kyung-hwan Yoon, Hyoung-hee Kim, Seong-woon Choi, Seok-hwan Oh
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Publication number: 20110053362Abstract: A method of forming a mask pattern, a method of forming a minute pattern, and a method of manufacturing a semiconductor device using the same, the method of forming the mask pattern including forming first mask patterns on a substrate; forming first preliminary capping layers on the first mask patterns; irradiating energy to the first preliminary capping patterns to form second preliminary capping layers ionically bonded with the first mask patterns; applying an acid to the second preliminary capping layers to form capping layers; forming a second mask layer between the capping layers, the second mask layer having a solubility lower than that of the capping layers; and removing the capping layers to form second mask patterns.Type: ApplicationFiled: September 1, 2010Publication date: March 3, 2011Inventors: Hyoung-Hee KIM, Yool Kang, Seong-Ho Moon, Seok-Hwan Oh, So-Ra Han, Seong-Woon Choi
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Publication number: 20100093172Abstract: A method of forming fine patterns of a semiconductor device includes forming a plurality of first mask patterns on a substrate such that the plurality of first mask patterns are separated from one another by a space located therebetween, in a direction parallel to a main surface of the substrate, forming a plurality of capping films formed of a first material having a first solubility in a solvent on sidewalls and a top surface of the plurality of first mask patterns. The method further includes forming a second mask layer formed of a second material having a second solubility in the solvent, which is less than the first solubility, so as to fill the space located between the plurality of first mask patterns, and forming a plurality of second mask patterns corresponding to residual portions of the second mask layer which remain in the space located between the plurality of first mask patterns, after removing the plurality of capping films and a portion of the second mask layer using the solvent.Type: ApplicationFiled: April 29, 2009Publication date: April 15, 2010Inventors: Hyoung-hee KIM, Yool KANG, Seong-woon CHOI, Jin-young YOON