Abstract: A high voltage integrated device includes a drift region in a substrate, a source region in the substrate and spaced apart from the drift region, a drain region in the drift region, a trench insulation layer in the drift region between the source region and the drain region, and a gate insulation layer and a gate electrode sequentially stacked on the substrate between the source region and the drift region and extending onto the trench insulation layers. The upper sidewall of the first trench insulation layer has a first angle to the bottom surface thereof and the lower sidewall of the first trench insulation layer has a second angle, which is smaller than the first angle, to the bottom surface thereof.