Abstract: An internal signal detector of a semiconductor memory device for detecting potential characteristics of internal signals representative of defective memory cells or circuits with an improved debugging operation having a plurality of first transfer transistors respectively tapped into a plurality of internal transmission lines connecting between the memory cells or circuits, for transferring selected internal signals in dependence upon a first control signal; a plurality of latch circuits respectively for latching potential characteristics of the selected internal signals; a plurality of second transfer transistors for transferring the latched potential characteristics of the selected signals in dependence upon a second control signal; and a shift register for transferring the latched potential characteristics of the selected internal signals to an exterior surface of the semiconductor memory device.