Abstract: A display device and a system for wirelessly transmitting/receiving an image signal are provided. The display device includes: a display panel that displays an image; an upper housing that is disposed on a front surface of the display panel and has an open window defining a display area; a lower housing that is disposed on a rear surface of the display panel and has a hole formed in a portion of an area corresponding to the display area; and a wireless communication module that is disposed on a rear surface of the lower housing and transmits or receives a wireless signal through the hole.

Abstract: A display apparatus includes a display panel, a plurality of sensors, a read-out circuit, and a control circuit. The display panel includes a plurality of pixels receiving a data signal having a polarity reversed with respect to a common voltage to display an image. The sensors sense light to output sensing signals. The sensors may be integrated into the display panel. The read-out circuit is charged with the sensing signals generating charged signals in response to a sampling signal generated during a period in which the common voltage has a predetermined reference voltage level. The control circuit calculates a position on the display panel from the charged signals received signals from the read-out circuit.

Abstract: A data driver includes data lines, data voltage output parts that output data voltages to the data lines, and a data voltage sharing part connected to the data lines. The data voltage sharing part connects output terminals of two or more of the data voltage output parts to each other to charge-share the data voltages therebetween.

Abstract: A pixel is driven by first converted image data having a first polarity and being converted by an A-gamma curve during an (N)th frame where ‘N’ is a natural number. The pixel is driven by second converted image data having a second polarity opposite to the first polarity and being converted using the A-gamma curve during an (N+1)th frame. The pixel is driven by third converted image data having the first polarity and being converted using a B-gamma curve different from the A-gamma curve during an (N+2)th frame. The pixel is driven by fourth converted image data having the second polarity and being converted by the B-gamma curve during an (N+3)th frame.

Abstract: A display apparatus includes a timing controller, a column driver, a row driver and a display unit. The timing controller outputs a first column clock embedded into image data during an active period, and outputs a second column clock embedded into blank data during a blank period. The column driver detects the first column clock and the image data and converts the image data into a first analog signal using the first column clock, and detects the second column clock and the blank data and converts the blank data into a second analog signal using the second column clock. The first column clock has a voltage level greater than a voltage level of the image data. The second column clock is embedded into the blank data and has a voltage level substantially the same as the voltage level of the image data.

Abstract: Provided are a display device, which can improve display quality by correcting an original image signal whose frame frequency is a first frequency or a second frequency different from the first frequency, and a method3 of driving the display device. The display device includes an image signal processor which corrects an original image signal whose frame frequency is a first frequency or a second frequency different from the first frequency and outputs a corrected image signal, a first lookup table which stores image correction data corresponding to an (n?1)-th frame and an n-th frame that corresponds to the original image signal having the first frequency, and a display panel which displays an image corresponding to the corrected image signal.

Abstract: A method of driving a display panel includes identifying a dimension of input data, where the input data is one of two-dimensional input data and three-dimensional input data, and generating first distributed data and second distributed data based on the dimension of the input data by at least one of copying the input data and dividing the input data into front data and back data.

Abstract: In a data compensating circuit and a display apparatus having the same, a previous compressed data compressed from a previous frame data is previously stored in a memory, a decoder decompresses the previous compressed data from the memory to output a previous decompressed data, a coder-decoder compresses a present frame data into a present compressed data to store the present compressed data in the memory and decompresses the present compressed data to output a present decompressed data. A first processor outputs a difference value between the previous decompressed data and the present decompressed data, a second processor adds the present frame data and the difference value to generate a previous re-decompressed data. A compensator outputs a present compensation data based on the previous re-decompressed data and the present frame data. Thus, the size of the memory may be reduced while preventing damage of data.

Abstract: A display device and a system for wirelessly transmitting/receiving an image signal are provided. The display device includes: a display panel that displays an image; an upper housing that is disposed on a front surface of the display panel and has an open window defining a display area; a lower housing that is disposed on a rear surface of the display panel and has a hole formed in a portion of an area corresponding to the display area; and a wireless communication module that is disposed on a rear surface of the lower housing and transmits or receives a wireless signal through the hole.

Abstract: A light source module includes a plurality of light-emitting blocks. A local-dimming driver drives the light-emitting blocks based on a received clock signal (first reference clock) and received dimming levels. The clock signal is input to a liquid crystal display panel and is also input to the local-dimming driver but is delayed within the local-dimming driver by fixed propagation delay. A delay modeling part performs modeling of the fixed propagation delay amount. The clock signal input to the local-dimming driver is first phase-compensated (delayed) by a phase compensation amount to synchronize the driving signals output by the local-dimming driver with the clock signal. The sum of the modeled propagation delay amount and the phase compensation amount is equal to an integral multiple of the period of the clock signal. The driving signal of the light-emitting blocks are synchronized and in phase with the clock signal.

Abstract: An apparatus for driving a display device includes a signal controller which converts an input image signal of a first frame frequency into a plurality of output image signals of a second frame frequency and outputs the output image signals, and a data driver which selects the data voltages corresponding to the output image signals among one group of gray voltages and applies the data voltages to pixels, wherein the input image signal includes at least a first input image signal and a second input image signal, the output image signal includes a first output image signal corresponding to the first input image signal and a second output image signal corresponding to the second input image signal, and a pixel frequency of the first and second output image signals are the same.

Abstract: A display apparatus includes a display panel, a plurality of sensors, a read-out circuit, and a control circuit. The display panel includes a plurality of pixels receiving a data signal having a polarity reversed with respect to a common voltage to display an image. The sensors sense light to output sensing signals. The sensors may be integrated into the display panel. The read-out circuit is charged with the sensing signals generating charged signals in response to a sampling signal generated during a period in which the common voltage has a predetermined reference voltage level. The control circuit calculates a position on the display panel from the charged signals received signals from the read-out circuit.

Abstract: A data driver includes data lines, data voltage output parts that output data voltages to the data lines, and a data voltage sharing part connected to the data lines. The data voltage sharing part connects output terminals of two or more of the data voltage output parts to each other to charge-share the data voltages therebetween.

Abstract: A wireless and multi-channel re-transmitting link is provided between an image displaying part that is housed in a first housing and an image data processing part that is housed in a segregated second housing. The wireless link allows the image displaying part to be more easily moved around and to be made lighter and slimmer in profile because at least some image data processing can be carried out in the second housing and yet cumbersome cables are not needed for linking the pre-processed image data from the second housing to the first housing. In one embodiment, the data bandwidth. that is to he transmitted through the wireless link is first reduced; for example the frame refresh rate of image frames conveyed through each of the wireless channels is made less than the frame refresh rate of the original image signal.

Abstract: A light source module includes a plurality of light-emitting blocks. A local-dimming driver drives the light-emitting blocks based on a received clock signal (first reference clock) and received dimming levels. The clock signal is input to a liquid crystal display panel and is also input to the local-dimming driver but is delayed within the local-dimming driver by fixed propagation delay. A delay modeling part performs modeling of the fixed propagation delay amount. The clock signal input to the local-dimming driver is first phase-compensated (delayed) by a phase compensation amount to synchronize the driving signals output by the local-dimming driver with the clock signal. The sum of the modeled propagation delay amount and the phase compensation amount is equal to an integral multiple of the period of the clock signal. The driving signal of the light-emitting blocks are synchronized and in phase with the clock signal.

Abstract: A display apparatus includes a timing controller, a column driver, a row driver and a display unit. The timing controller outputs a first column clock embedded into image data during an active period, and outputs a second column clock embedded into blank data during a blank period. The column driver detects the first column clock and the image data and converts the image data into a first analog signal using the first column clock, and detects the second column clock and the blank data and converts the blank data into a second analog signal using the second column clock. The first column clock has a voltage level greater than a voltage level of the image data. The second column clock is embedded into the blank data and has a voltage level substantially the same as the voltage level of the image data.

Abstract: Provided are a display device, which can improve display quality by correcting an original image signal whose frame frequency is a first frequency or a second frequency different from the first frequency, and a method3 of driving the display device. The display device includes an image signal processor which corrects an original image signal whose frame frequency is a first frequency or a second frequency different from the first frequency and outputs a corrected image signal, a first lookup table which stores image correction data corresponding to an (n?1)-th frame and an n-th frame that corresponds to the original image signal having the first frequency, and a display panel which displays an image corresponding to the corrected image signal.

Abstract: The present invention relates to a driving device for a liquid crystal display and a driving method thereof. A signal controller of the driving device generates a data signal according to an input image signal input to the display device, generates a clock signal according to the input control signal, and generates a differential pair image signal by modulating the clock signal to the data signal. Here, a data signal period of the differential pair image signal and a clock signal period are converted with a different level and are output. A data driver of the driving device receives the differential pair image signal, divides the data signal and the clock signal from the differential pair image signal, and generates a data voltage by sampling a data signal by using the clock signal.

Abstract: A pixel is driven by first converted image data having a first polarity and being converted by an A-gamma curve during an (N)th frame where ‘N’ is a natural number. The pixel is driven by second converted image data having a second polarity opposite to the first polarity and being converted using the A-gamma curve during an (N+1)th frame. The pixel is driven by third converted image data having the first polarity and being converted using a B-gamma curve different from the A-gamma curve during an (N+2)th frame. The pixel is driven by fourth converted image data having the second polarity and being converted by the B-gamma curve during an (N+3)th frame.

Abstract: The present invention relates to a driving circuit for a liquid crystal display and a driving method thereof. A signal controller of the driving circuit generates a data signal according to an input image signal input to the display device, generates a clock signal according to the input control signal, and generates a differential pair image signal by modulating the clock signal to the data signal. Here, a data signal period of the differential pair image signal and a clock signal period are converted with a different level and are output. A data driver of the driving device receives the differential pair image signal, divides the data signal and the clock signal from the differential pair image signal, and generates a data voltage by sampling a data signal by using the clock signal.