Abstract: A display device includes: a substrate; a conductive pattern layer disposed on the substrate; a buffer layer disposed on the conductive pattern layer; an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region; an insulating pattern layer disposed on the channel region; an oxide pattern layer disposed on the insulating pattern layer; a gate electrode disposed on the oxide pattern layer; and a connecting member electrically connected to the conductive pattern layer and the conductive region. The connecting member and the oxide pattern layer include a same material.

Abstract: A display device includes plurality of light-emitting elements. A plurality of pixel drivers are respectively connected to the light-emitting elements. Each of the plurality of pixel drivers includes a first transistor including a first oxide semiconductor pattern, a second transistor electrically connected to the first transistor and including a second oxide semiconductor pattern, and a capacitor electrically connected to a gate of the first transistor. The first oxide semiconductor pattern has a crystalline structure and the second oxide semiconductor pattern has an amorphous structure.

Abstract: A thin-film transistor includes a substrate; a first electrode on the substrate; a first gate electrode on the first electrode; a first buffer layer between the first electrode and the first gate electrode; a first gate insulating layer on the first gate electrode; a second electrode on the first gate insulating layer; an active layer being extended in a horizontal direction along a bottom surface and in a normal direction along an internal wall of a first opening penetrating the first gate electrode, the first buffer layer, the first gate insulating layer, and the second electrode, and connected to the first electrode and the second electrode; a second gate electrode being extended along a surface of the active layer; and a second gate insulating layer between the active layer and the second gate electrode.

Abstract: A electronic device includes a processor to provide input image data, and a display device to display an image based on the input image data, the display device including pixels, wherein any one pixel among the pixels includes a first transistor connected to second node and having a gate electrode connected to a first node; a second transistor connected between a data line and the first node and having a gate electrode connected to a first line; a third transistor connected between a reference-power node and the first node and having a gate electrode connected to a second line; a fourth transistor connected between an initialization-power node and a third node and having a gate electrode connected to a third line; a fifth transistor connected between a drive-power node and the first transistor and having a gate electrode connected to a first-light-emitting-control line; a sixth transistor connected between the second node and the third node and having a gate electrode connected to a second-light-emitting-cont

Abstract: A display device includes a display area including a plurality of pixels, a display driver disposed outside the display area to apply a data voltage, a plurality of data lines for applying the data voltage to the plurality of pixels, and a bridge line electrically connecting some of the data lines with the display driver. The bridge line includes a first bridge line extended from the display driver in a first direction, and a second bridge line connected to the first bridge line and extended in a second direction intersecting the first direction. The second bridge line includes a plurality of first portions extended in the second direction and spaced apart from each other in the second direction, and a second portion disposed on the first portions and electrically connecting the first portions.

Abstract: A display device includes a pixel circuit layer including a base layer, a first transistor on the base layer and a second transistor on the base layer. The first transistor includes a first active layer, a first upper gate conductive layer on the first active layer, and an intermediate conductive structure spaced further from the base layer than the first upper gate conductive layer is, and the second transistor includes a second active layer and a second upper gate conductive layer on the second active layer, and a light emitting element on the pixel circuit layer. The first active layer includes a polysilicon material, and the second active layer includes an oxide semiconductor. The intermediate conductive structure is in a same layer as the second upper gate conductive layer and is connected to the first active layer or the first upper gate conductive layer through a contact structure.

Abstract: A display device includes: a buffer layer including an inorganic insulating material, an active pattern disposed on the buffer layer and including a channel region and a first conductor region adjacent to the channel region, a gate insulating layer disposed on the buffer layer and the active pattern and including an inorganic insulating material, a gate electrode layer including a first electrode extending along a side surface of the gate insulating layer and including a first contact portion electrically contacting the first conductor region, and an oxygen supply layer including a first pattern disposed between the first electrode and the gate insulating layer, wherein the first pattern includes a first groove recessed from a side surface of to surround at least a part of the first contact portion in a plan view.

Abstract: A display device includes: a first electrode and a second electrode spaced from the first electrode; a first insulating layer on the first electrode and the second electrode; a plurality of light emitting elements on the first insulating layer and on the first electrode and the second electrode; a first connection electrode on the first electrode and contacting the plurality of light emitting elements; and a second connection electrode on the second electrode and contacting the plurality of light emitting elements, wherein each of the first electrode and the second electrode includes a first metal layer and a second metal layer on the first metal layer and including a different material from the first metal layer, a thickness of the first metal layer is between 100 ? to 300 ?, and a thickness of each of the first electrode and the second electrode is 2600 ? or less.

Abstract: A display device includes: a substrate; a conductive pattern layer disposed on the substrate; a buffer layer disposed on the conductive pattern layer; an active pattern layer disposed on the buffer layer and including a channel region and a conductive region adjacent to the channel region; an insulating pattern layer disposed on the channel region; an oxide pattern layer disposed on the insulating pattern layer; a gate electrode disposed on the oxide pattern layer; and a connecting member electrically connected to the conductive pattern layer and the conductive region. The connecting member and the oxide pattern layer include a same material.

Abstract: A display device including a first substrate including a display area, and a non-display area, a second substrate on the first substrate, and a sealing member in a sealing area of the non-display area. The first substrate includes a first base portion, a first conductive layer including a first signal line and a lower light blocking layer, on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping the lower light blocking layer, on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including second and third signal lines electrically connected to the first signal line, and a gate electrode overlapping the semiconductor layer, on the gate insulating layer. In plan view, the first signal line is between the second signal line and the third signal line. The first signal line overlaps the sealing member.

Abstract: Provided is a routing method for determining a destination in a computer network having multiple interconnected nodes, the method for measuring packet delays among remotely located gateways and processing routing in application layers of the gateways using the packet delays. The routing method based on packet delay includes the steps of setting a re-routing interval and measuring one-way delays among gateways, exchanging the measured delays among the respective gateways and forming delay time tables, calculating an average one-way delay during the re-routing interval, and if a packet is received, applying the calculated average one-way delay to a predetermined algorithm and determining a path from a source gateway to a destination gateway, the path having the minimum delay. Therefore, an improved routing performance can be achieved in real time transmitting a packet by determining the minimum delay path to a destination by measuring packet delays among remotely located nodes in application layers thereof.

Abstract: A blind watermarking method by grouping codewords for VQ-quantized images is disclosed. Especially there is provided a watermark insertion method in which a codebook is divided into three groups satisfying specific standards and a codeword is allocated based on the group to which the corresponding codeword belongs to insert watermark information, and a watermark extraction method for extracting the watermark inserted by the watermark insertion method. According to the present invention, watermark information can be uniformly inserted into an input vector space and the original image is not needed for extracting the watermark information.

Abstract: A blind watermarking method by grouping codewords for VQ-quantized images is disclosed. Especially there is provided a watermark insertion method in which a codebook is divided into three groups satisfying specific standards and a codeword is allocated based on the group to which the corresponding codeword belongs to insert watermark information, and a watermark extraction method for extracting the watermark inserted by the watermark insertion method. According to the present invention, watermark information can be uniformly inserted into an input vector space and the original image is not needed for extracting the watermark information.

Abstract: Provided is a routing method for determining a destination in a computer network having multiple interconnected nodes, the method for measuring packet delays among remotely located gateways and processing routing in application layers of the gateways using the packet delays. The routing method based on packet delay includes the steps of setting a re-routing interval and measuring one-way delays among gateways, exchanging the measured delays among the respective gateways and forming delay time tables, calculating an average one-way delay during the re-routing interval, and if a packet is received, applying the calculated average one-way delay to a predetermined algorithm and determining a path from a source gateway to a destination gateway, the path having the minimum delay. Therefore, an improved routing performance can be achieved in real time transmitting a packet by determining the minimum delay path to a destination by measuring packet delays among remotely located nodes in application layers thereof.