Patents by Inventor Hyun Cheol Ryu
Hyun Cheol Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240135595Abstract: The present invention relates to a method and apparatus for encoding a displacement video using image tiling. A method for encoding multi-dimensional data according to an embodiment of the present disclosure may comprise: converting the multi-dimensional data into one or more frames with two-dimensional characteristics; generating one or more frame groups by grouping the one or more frames with pre-configured number units; reconstructing frames belonging to each frame group into a tiled frame; and generating a bitstream by encoding the tiled frame. Here, the tiled frame may be constructed with one or more blocks, and each block may be constructed by rearranging pixels existing at the same location in the frames.Type: ApplicationFiled: October 17, 2023Publication date: April 25, 2024Applicant: Electronics and Telecommunications Research InstituteInventors: Da Yun NAM, Hyun Cheol KIM, Jeong Il SEO, Seong Yong LIM, Chae Eun RHEE, Gwang Cheol RYU, Yong Wook SEO, Hyun Min JUNG
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Publication number: 20240101508Abstract: The present invention relates to a method for preparing an isocyanate compound. According to the present invention, provided is a method for preparing an isocyanate compound that can minimize thermal denaturation of a reaction product and formation of by-products and obtain a high-purity isocyanate compound during the preparation of an isocyanate compound using phosgene.Type: ApplicationFiled: December 30, 2021Publication date: March 28, 2024Inventors: Hyun Cheol RYU, Ju Wu MIN, Keedo HAN
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Publication number: 20240067602Abstract: The present invention relates to a method for preparing an isocyanate compound. According to the present invention, provided is a method for preparing an isocyanate compound that can recover and reuse materials used in the reaction during the preparation of an isocyanate compound using phosgene, and can minimize thermal denaturation of a reaction product and formation of by-products.Type: ApplicationFiled: December 30, 2021Publication date: February 29, 2024Inventors: Hyun Cheol RYU, Ju Won MIN
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Publication number: 20240067601Abstract: The present invention relates to a method for preparing an isocyanate compound. According to the present invention, provided is a method for preparing an isocyanate compound that can increase energy efficiency while minimizing thermal denaturation of a reaction product and formation of by-products during the preparation of an isocyanate compound using phosgene.Type: ApplicationFiled: December 30, 2021Publication date: February 29, 2024Inventors: Ju Won MIN, Hyun Cheol RYU, Keedo HAN
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Publication number: 20240050909Abstract: A batch reactor according to an embodiment of the present disclosure includes: a reactor receiving a solvent in a liquid phase; a sparger configured to supply a raw material in a gas phase into the reactor; and a stirrer having an impeller on a rotational shaft installed in the reactor in a height direction to stir the solvent and the raw material, in which the impeller includes a radial-type impeller and an axial-type impeller.Type: ApplicationFiled: December 17, 2021Publication date: February 15, 2024Inventors: Hye Won LEE, Hyun Cheol RYU, Keedo HAN
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Publication number: 20240001330Abstract: A reactor according to an embodiment of the present invention, the reactor including: a mixing chamber formed as a circular tube; a first injection nozzle connected to the mixing chamber while maintaining a predetermined spacing along a circumferential direction and configured to inject a first mixture; an annular chamber disposed spaced apart from an outer side of the mixing chamber; a second injection nozzle configured to connect the annular chamber to the mixing chamber to inject a second mixture supplied to the annular chamber in a direction intersecting the injection of the first mixture; and an outlet pipe connected to the mixing chamber to discharge a reactant produced by mixing the first and second mixtures in the mixing chamber, in which the second injection nozzle is spaced apart from the first injection nozzle by a predetermined angle in the circumferential direction.Type: ApplicationFiled: November 26, 2021Publication date: January 4, 2024Inventors: Joon Hwan KIM, Hyun Cheol RYU, Keedo HAN
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Publication number: 20210363099Abstract: The present invention relates to a method for preparing aliphatic isocyanate. More specifically, the present invention relates to a high purity isocyanate preparation method that can effectively recover unreacted materials and recycle them to a reaction step, and reduce energy consumed when separating reactants.Type: ApplicationFiled: June 3, 2019Publication date: November 25, 2021Inventors: Hyun Cheol RYU, Kee Do HAN
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Patent number: 11028046Abstract: The present invention relates to a toluene diisocyanate purification method enabling acquisition of a product having a small amount of dimers in a final product by means of using a reactive dividing wall column during toluene diisocyanate preparation. More particularly, according to the present invention, in order to obtain a product having a small amount of dimers in accordance with a reversible reaction of a monomer and a dimer, a purification procedure is designed by means of applying the temperature, pressure, time of stay and the like of a reactive dividing wall column as appropriate particular conditions, a reboiler having short time of stay and high heat transfer rate is used, and thus a dimerization reaction is inhibited and the purity and yield of the product are enhanced. Therefore, high-purity toluene diisocyanate can be purified and obtained.Type: GrantFiled: December 12, 2017Date of Patent: June 8, 2021Assignee: HANWHA CHEMICAL CORPORATIONInventors: Hyun Cheol Ryu, Kee Do Han, Seong Ho Park, Chang Mo Chung
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Publication number: 20200377447Abstract: The present invention relates to a toluene diisocyanate purification method enabling acquisition of a product having a small amount of dimers in a final product by means of using a reactive dividing wall column during toluene diisocyanate preparation. More particularly, according to the present invention, in order to obtain a product having a small amount of dimers in accordance with a reversible reaction of a monomer and a dimer, a purification procedure is designed by means of applying the temperature, pressure, time of stay and the like of a reactive dividing wall column as appropriate particular conditions, a reboiler having short time of stay and high heat transfer rate is used, and thus a dimerization reaction is inhibited and the purity and yield of the product are enhanced. Therefore, high-purity toluene diisocyanate can be purified and obtained.Type: ApplicationFiled: December 12, 2017Publication date: December 3, 2020Inventors: Hyun Cheol RYU, Kee Do HAN, Seong Ho PARK, Chang Mo CHUNG
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Patent number: 9469544Abstract: The present invention relates to a method for manufacturing polysilicon. According to the present invention, meltdown can be prevented during the growth of silicon rod, and a polycrystalline silicon rod having a larger diameter can be shortly manufactured with a minimal consumption of energy.Type: GrantFiled: September 26, 2012Date of Patent: October 18, 2016Assignee: HANWHA CHEMICAL CORPORATIONInventors: Hyun-Cheol Ryu, Jea Sung Park, Dong-Ho Lee, Eun-Jeong Kim, Gui Ryong Ahn, Sung Eun Park
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Patent number: 9093580Abstract: Provided is a method of manufacturing a solar cell, wherein a solar cell is manufactured by combining a damage removal etching process, a texturing process and an edge isolation process. The method is advantageous in that RIE and DRE are conducted, and then DRE/PSG and/or an edge isolation removal process are simultaneously conducted, so that the movement of a substrate (that is, a wafer) is minimized, thereby reducing the damage rate of the substrate.Type: GrantFiled: February 24, 2012Date of Patent: July 28, 2015Assignee: HANWHA CHEMICAL CORPORATIONInventors: Deoc Hwan Hyun, Jae Eock Cho, Dong Ho Lee, Gui Ryong Ahn, Hyun Cheol Ryu, Yong Hwa Lee, Gang II Kim
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Publication number: 20140356535Abstract: The present invention relates to a method for manufacturing polysilicon. According to the present invention, meltdown can be prevented during the growth of silicon rod, and a polycrystalline silicon rod having a larger diameter can be shortly manufactured with a minimal consumption of energy.Type: ApplicationFiled: September 26, 2012Publication date: December 4, 2014Inventors: Hyun-Cheol Ryu, Jea Sung Park, Dong-Ho Lee, Eun-Jeong Kim, Gui Ryong Ahn, Sung Eun Park
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Publication number: 20140069498Abstract: Provided is a solar cell, including: a semiconductor substrate having a p-n junction; an antireflection film formed on at least one side of the semiconductor substrate; first electrodes formed on the antireflection film; and second electrodes covering the first electrodes, wherein only the first electrodes selectively penetrate the antireflection film and is thus connected with the semiconductor substrate by a punch through process.Type: ApplicationFiled: March 13, 2012Publication date: March 13, 2014Applicant: HANWHA CHEMICAL CORPORATIONInventors: Jae Eock Cho, Yong Hwa Lee, Dong Ho Lee, Hyun Cheol Ryu, Gang Il Kim, Deoc Hwan Hyun
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Publication number: 20140014173Abstract: Provided are a solar cell and a method for manufacturing the same, and more particularly, a solar cell for forming a selective emitter structure and a surface texture using dry plasma etching at the same time, and a method for manufacturing the same. The solar cell includes a silicon semiconductor substrate; an emitter doping layer having a surface, which is textured by a texturing process on an upper portion of the silicon semiconductor substrate and selectively doped; an anti-reflective film layer formed on a front of the substrate; a front electrode accessing to the emitter doping layer by penetrating the anti-reflective film layer; and a rear electrode accessing to a rear of the silicon semiconductor substrate.Type: ApplicationFiled: February 23, 2012Publication date: January 16, 2014Applicant: HANWHA CHEMICAL CORPORATIONInventors: Deoc Hwan Hyun, Jae Eock Cho, Dong Ho Lee, Hyun Cheol Ryu, Yong Hwa Lee, Gang Il Kim, Gui Ryong Ahn
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Publication number: 20140017847Abstract: Provided is a method of manufacturing a solar cell, wherein a solar cell is manufactured by combining a damage removal etching process, a texturing process and an edge isolation process. The method is advantageous in that RIE and DRE are conducted, and then DRE/PSG and/or an edge isolation removal process are simultaneously conducted, so that the movement of a substrate (that is, a wafer) is minimized, thereby reducing the damage rate of the substrate.Type: ApplicationFiled: February 24, 2012Publication date: January 16, 2014Applicant: Hanwha Chemical CorporationInventors: Deoc Hwan Hyun, Jae Eock Cho, Dong Ho Lee, Gui Ryong Ahn, Hyun Cheol Ryu, Yong Hwa Lee, Gang Il Kim