Abstract: An embodiment solid electrolyte includes a first compound and a second compound. The first compound is represented by a first chemical formula Li7-aPS6-a(X11-bX2b)a, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, and wherein 0<a?2 and 0<b<1, and the second compound is represented by a second chemical formula Li7-cP1-2dMdS6-c-3d(X11-eX2e)c, wherein X1 and X2 are the same or different and each represents F, Cl, Br, or I, wherein M represents Ge, Si, Sn, or any combination thereof, and wherein 0<c?2, 0<d<0.5, and 0<e<1.

Abstract: A memory device including a plurality of memory cells, a peripheral circuit, and control logic. The peripheral circuit is configured to generate a plurality of operating voltages used in a memory operation, based on a target pump clock, and perform the memory operation by using the plurality of operating voltages. The control logic is configured to select the target pump clock among a plurality of pump clocks, based on a number of data bits which selected memory cells on which the memory operation is to be performed among the plurality of memory cells store, and control the peripheral circuit to perform the memory operation on the selected memory cells.

Abstract: A memory device may include: a memory cell array including a plurality of planes; and a voltage generation circuit including a master pump component and at least one or more sub-pump components that respectively correspond to the planes. During an interleaved operation, the master pump component may generate a first output voltage in response to a first pump clock, and the sub-pump components may generate second output voltages in response to second pump clocks. The master pump component and the sub-pump components may respectively provide the first output voltage and the second output voltages to the corresponding planes. During a non-interleaved operation, the master pump component and the sub-pump components may generate the first output voltage in response to the first pump clock and provide the first output voltage to a selected plane of the plurality of planes.

Abstract: Provided herein is a memory device and a method of operating the same. The memory device may include a memory block, a voltage generation circuit configured to operate in a first mode in which an operating voltage is generated using an internal voltage or a second mode in which the operating voltage is generated using an external voltage, and to provide the operating voltage to the memory block, and a control logic configured to measure and store a first rising time during which the operating voltage rises to a target level in the first mode, and to control the voltage generation circuit so that a second rising time during which the operating voltage rises to the target level in the second mode is equal to or longer than the first rising time.

Abstract: The present technology includes a voltage generator and a memory device including the voltage generator. The voltage generator includes an operation code determiner configured to output a clock control code including the number of planes in response to an operation code, a clock group configured to simultaneously generate clocks having different periods according to the clock control code, and a pump group configured to perform a pumping operation according to the clocks and output operation voltages.

Abstract: The present technology includes a voltage generator and a memory device including the voltage generator. The voltage generator includes an operation code determiner configured to output a clock control code including the number of planes in response to an operation code, a clock group configured to simultaneously generate clocks having different periods according to the clock control code, and a pump group configured to perform a pumping operation according to the clocks and output operation voltages.

Abstract: Provided herein is a memory device and a method of operating the same. The memory device may include a memory block, a voltage generation circuit configured to operate in a first mode in which an operating voltage is generated using an internal voltage or a second mode in which the operating voltage is generated using an external voltage, and to provide the operating voltage to the memory block, and a control logic configured to measure and store a first rising time during which the operating voltage rises to a target level in the first mode, and to control the voltage generation circuit so that a second rising time during which the operating voltage rises to the target level in the second mode is equal to or longer than the first rising time.

Abstract: A memory device may include: a memory cell array including a plurality of planes; and a voltage generation circuit including a master pump component and at least one or more sub-pump components that respectively correspond to the planes. During an interleaved operation, the master pump component may generate a first output voltage in response to a first pump clock, and the sub-pump components may generate second output voltages in response to second pump clocks. The master pump component and the sub-pump components may respectively provide the first output voltage and the second output voltages to the corresponding planes. During a non-interleaved operation, the master pump component and the sub-pump components may generate the first output voltage in response to the first pump clock and provide the first output voltage to a selected plane of the plurality of planes.

Abstract: The present disclosure relates to method of operating a memory device, the memory device includes a memory cell array, a voltage generator, and control logic. The voltage generator configured to increase a power supply voltage. The control logic is configured to store a time based on the increased power supply voltage and a reference voltage. The reference voltage is a voltage level used to perform an operation on the memory cell array.

Abstract: Disclosed is an electronic device and a method for processing authentication. The electronic device includes a communication circuit; a display; a memory; and at least one processor electrically connected to the communication circuit, the display, and the memory, wherein the memory stores instructions that cause the at least one processor to identify whether the electronic device is mounted on a first external electronic device, execute at least one application for an authentication based at least part of the identification, detect a second external electronic device, which can transmit authentication information related to the authentication, receive at least one piece of information related to the authentication from the second external electronic device based at least partially on the detection outcome, and perform authentication based on the received authentication information.

Abstract: The present disclosure relates to method of operating a memory device, the memory device includes a memory cell array, a voltage generator, and control logic. The voltage generator configured to increase a power supply voltage. The control logic is configured to store a time based on the increased power supply voltage and a reference voltage. The reference voltage is a voltage level used to perform an operation on the memory cell array.

Abstract: A method for registering a tooth image with a tooth structure according to an embodiment includes a first registering step for registering a tooth image model obtained from a medical image taken when an object bites a bite including a marker with a bite scanning model obtained by scanning the bite, a second registering step for registering the bite scanning model with a tooth scanning model obtained by scanning a tooth shape of the object, and a third registering step for registering the tooth image model with the tooth scanning model based on the results of the first registering step and the results of the second registering step. As a result, a model including an accurate shape of tooth part difficult to obtain from a medical imaging apparatus can be easily obtained.

Abstract: Disclosed is an electronic device and a method for processing authentication. The electronic device includes a communication circuit; a display; a memory; and at least one processor electrically connected to the communication circuit, the display, and the memory, wherein the memory stores instructions that cause the at least one processor to identify whether the electronic device is mounted on a first external electronic device, execute at least one application for an authentication based at least part of the identification, detect a second external electronic device, which can transmit authentication information related to the authentication, receive at least one piece of information related to the authentication from the second external electronic device based at least partially on the detection outcome, and perform authentication based on the received authentication information.

Abstract: An electronic apparatus is provided that includes: a communicator performing communication with a server; and a processor providing a user interface that receives information on a previous broadcasting program broadcast before a broadcasting program and a subsequent broadcasting program broadcast after the broadcasting program on a channel on which the broadcasting program is broadcast from the server and indicates a broadcasting schedule for at least one for the previous broadcasting program, the broadcasting program, and the subsequent broadcasting program based on the information on the received broadcasting program.

Abstract: A method for registering a tooth image with a tooth structure according to an embodiment includes a first registering step for registering a tooth image model obtained from a medical image taken when an object bites a bite including a marker with a bite scanning model obtained by scanning the bite, a second registering step for registering the bite scanning model with a tooth scanning model obtained by scanning a tooth shape of the object, and a third registering step for registering the tooth image model with the tooth scanning model based on the results of the first registering step and the results of the second registering step. As a result, a model including an accurate shape of tooth part difficult to obtain from a medical imaging apparatus can be easily obtained.

Abstract: The present disclosure relates to a low noise tire, and more specifically, to a low noise tire that includes: a sealant layer adhered to an inside surface of an inner liner of the tire; and a sound-absorbing material layer adhered to the sealant layer, in which the sound-absorbing material layer includes 50 to 90 wt % of a polypropylene melt-blown fiber and 10 to 50 wt % of a polymer fiber.

Abstract: The present disclosure relates to a low noise tire, and more specifically, to a low noise tire that includes: a sealant layer adhered to an inside surface of an inner liner of the tire; and a sound-absorbing material layer adhered to the sealant layer, in which the sound-absorbing material layer includes 50 to 90 wt % of a polypropylene melt-blown fiber and 10 to 50 wt % of a polymer fiber.

Abstract: An internal voltage generator includes an internal voltage control unit suitable for generate an enable signal based on a voltage level of an internal voltage, a clock control unit suitable for generate a control clock having a restricted toggling period based on the enable signal and a clock while controlling the toggling number of the control clock, and an internal voltage generation unit suitable for generate the internal voltage based on the control clock.

Abstract: An internal voltage generator includes an internal voltage control unit suitable for generate an enable signal based on a voltage level of an internal voltage, a clock control unit suitable for generate a control clock having a restricted toggling period based on the enable signal and a clock while controlling the toggling number of the control clock, and an internal voltage generation unit suitable for generate the internal voltage based on the control clock.

Abstract: A heat exchanger including a plurality of tubes disposed horizontally, a pair of vertical headers connecting the tubes, and at least one flow distribution baffle mounted to a header at one group of the plurality of tubes such that the flow distribution baffle is positioned between tubes of the one group. Each of the at least one flow distribution baffle is provided with at least one distribution hole allowing a refrigerant to pass therethrough. The heat exchanger prevents unbalanced distribution of the refrigerant when it operates as an evaporator of an outdoor unit.