Abstract: A dynamic damper for a vehicle, includes: a mass; a first bolt including a first bolt head and a first bolt body; a first elastic portion having one portion flexibly bonded to the first bolt head of the first bolt and the other portion flexibly bonded to the mass; a second bolt including a second bolt head and a second bolt body; a second elastic portion having one portion flexibly bonded to the second bolt head of the second bolt and the other portion flexibly bonded to the mass; a first bracket including a first bolt-coupling plate; a first nut screw-engaged with the first bolt body of the first bolt; a second bracket comprising a second bolt-coupling plate extending in a top-bottom direction; and a second nut screw-engaged with the second bolt body of the second bolt to couple the second bolt to the second bolt-coupling plate.

Abstract: A dynamic damper for a vehicle, includes: a mass; a first bolt including a first bolt head and a first bolt body; a first elastic portion having one portion flexibly bonded to the first bolt head of the first bolt and the other portion flexibly bonded to the mass; a second bolt including a second bolt head and a second bolt body; a second elastic portion having one portion flexibly bonded to the second bolt head of the second bolt and the other portion flexibly bonded to the mass; a first bracket including a first bolt-coupling plate; a first nut screw-engaged with the first bolt body of the first bolt; a second bracket comprising a second bolt-coupling plate extending in a top-bottom direction; and a second nut screw-engaged with the second bolt body of the second bolt to couple the second bolt to the second bolt-coupling plate.

Abstract: Provided are a 3-dimensional non-volatile memory device and a method of fabricating the same. The 3-dimensional non-volatile memory device may include a substrate; semiconductor pillars, which are arranged at a certain interval in a first direction and a second direction different from the first direction; a string isolation film, which is arranged between the semiconductor pillars arranged in the first direction among the semiconductor pillars and extends in the first direction and a third direction vertical to the main surface of the substrate; first sub-electrodes repeatedly stacked on the substrate in the third direction; second sub-electrodes, which are electrically isolated from the first sub-electrodes by the string isolation film, and are repeatedly stacked on the substrate in the third direction; and information storage films including a first information storage film and a second information storage film.

Abstract: Provided are a 3-dimensional non-volatile memory device and a method of fabricating the same. The 3-dimensional non-volatile memory device may include a substrate; semiconductor pillars, which are arranged at a certain interval in a first direction and a second direction different from the first direction; a string isolation film, which is arranged between the semiconductor pillars arranged in the first direction among the semiconductor pillars and extends in the first direction and a third direction vertical to the main surface of the substrate; first sub-electrodes repeatedly stacked on the substrate in the third direction; second sub-electrodes, which are electrically isolated from the first sub-electrodes by the string isolation film, and are repeatedly stacked on the substrate in the third direction; and information storage films including a first information storage film and a second information storage film.

Abstract: Disclosed herein is a dynamic damper that can reduce vibrations with respect to not only the axial direction but also the radial direction of a connector connected to a vibration generating source.

Abstract: Disclosed herein is a dynamic damper that can reduce vibrations with respect to not only the axial direction but also the radial direction of a connector connected to a vibration generating source.

Abstract: An image sensor includes a pixel layer in which an active pixel array and an optical black pixel array are formed; a first anti-reflective layer which is formed over the active pixel array, and including a hafnium oxide layer with a high transmittance; and a second anti-reflective layer which is formed over the optical black pixel array, and including a hafnium oxide layer with a low transmittance.

Abstract: A nonvolatile resistive switching memory (ReRAM) device having no selection device is provided. The ReRAM device includes a lower electrode that is formed on on a substrate; a metal oxide layer that is formed on the lower electrode, the metal oxide layer having a resistive switching characteristic; an upper electrode that is formed on the metal oxide layer; and a tunnel barrier oxide film that is formed between the lower electrode and the metal oxide layer, thereby forming a double oxide film structure, the tunnel barrier oxide film being made of a material, a band energy gap and a conduction band offset of which are lower than those of the metal oxide layer, and which does not cause interface switching.

Abstract: A hydromount absorbs and alleviates vibration of driving components such as an engine, a power train, a transmission, and the like of a vehicle, and more particularly, to a three point supporting hydromount in which inner pipes are disposed in a horizontal direction of a vehicle frame.

Abstract: Example methods and example embodiments include methods of fabricating semiconductor devices and semiconductor devices fabricated by the same. Example fabricating methods include forming a first nanowire, oxidizing the first nanowire to form a first nanostructure including a first insulator and a second nanowire, and oxidizing the second nanowire to form a second nanostructure including a second insulator and nanodots. Example semiconductor devices include nanostructures including nanodots and nanostructures providing storage nodes in memory devices.

Abstract: A hydromount absorbs and alleviates vibration of driving components such as an engine, a power train, a transmission, and the like of a vehicle, and more particularly, to a three point supporting hydromount in which inner pipes are disposed in a horizontal direction of a vehicle frame.

Abstract: A memory device includes a substrate and a memory cell including a first electrode on the substrate, a phase-change material region on the first electrode and a second electrode on the phase-change material region opposite the first electrode. The memory device further includes a stress relief buffer adjacent a sidewall of the phase-change material region between the first and second electrodes. In some embodiments, the stress relief buffer includes a stress relief region contacting the sidewall of the phase-change material region. In further embodiments, the stress relief buffer includes a void adjacent the sidewall of the phase-change material region.

Abstract: Disclosed are a transistor and a method for fabricating the same capable of increasing a threshold voltage and a driving current of the transistor. The method includes the steps of forming a first etch mask on a silicon substrate, forming a trench by etching the exposed isolation area, forming a first insulation layer in the trench and the first etch mask, forming a second insulation layer on the first insulation layer, removing the second insulation layer and the first insulation layer until the first etch mask is exposed, forming a trench type isolation layer on the isolation area, forming a second etch mask on an entire surface of the silicon substrate, etching the exposed channel area, performing an etching process with respect to a resultant substrate structure, and forming a gate in the recess.

Abstract: Example methods and example embodiments include methods of fabricating semiconductor devices and semiconductor devices fabricated by the same. Example fabricating methods include forming a first nanowire, oxidizing the first nanowire to form a first nanostructure including a first insulator and a second nanowire, and oxidizing the second nanowire to form a second nanostructure including a second insulator and nanodots. Example semiconductor devices include nanostructures including nanodots and nanostructures providing storage nodes in memory devices.

Abstract: A plasma doping method includes providing a doping source over a substrate. The doping source includes dopants that are to be injected into the substrate. At least two different bias voltages are applied to inject the dopants from the doping source to the substrate.

Abstract: Disclosed are a transistor and a method for fabricating the same capable of increasing a threshold voltage and a driving current of the transistor. The method includes the steps of forming a first etch mask on a silicon substrate, forming a trench by etching the exposed isolation area, forming a first insulation layer in the trench and the first etch mask, forming a second insulation layer on the first insulation layer, removing the second insulation layer and the first insulation layer until the first etch mask is exposed, forming a trench type isolation layer on the isolation area, forming a second etch mask on an entire surface of the silicon substrate, etching the exposed channel area, performing an etching process with respect to a resultant substrate structure, and forming a gate in the recess.

Abstract: Disclosed are a transistor and a method for fabricating the same capable of increasing a threshold voltage and a driving current of the transistor. The method includes the steps of forming a first etch mask on a silicon substrate, forming a trench by etching the exposed isolation area, forming a first insulation layer in the trench and the first etch mask, forming a second insulation layer on the first insulation layer, removing the second insulation layer and the first insulation layer until the first etch mask is exposed, forming a trench type isolation layer on the isolation area, forming a second etch mask on an entire surface of the silicon substrate, etching the exposed channel area, performing an etching process with respect to a resultant substrate structure, and forming a gate in the recess.

Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.

Abstract: A fin transistor is formed by forming a hard mask layer on a substrate having an active region and a field region. The hard mask layer is etched to expose the field region. A trench is formed by etching the exposed field region. The trench is filled with an SOG layer. The hard mask layer is removed to expose the active region. An epi-silicon layer is formed on the exposed active region. The SOG layer is then partially etched from the upper end of the trench, thus filling a lower portion of the trench. A HDP oxide layer is deposited on the etched SOG layer filling the trench, thereby forming a field oxide layer composed of the SOG layer and the HDP oxide. The HDP oxide layer in the field oxide layer is etched to expose both side surfaces of the epi-silicon layer. A gate is then formed on the epi-silicon layer of which both side surfaces are exposed and the field oxide layer.

Abstract: Disclosed is a method for forming a capacitor of a semiconductor device. In such a method, a mold insulating layer is formed on an insulating interlayer provided with a storage node plug, and the mold insulating layer is etched to form a hole through which the storage node plug is exposed. Next, a metal storage electrode with an interposed WN layer is formed on a hole surface including the exposed storage node plug and the mold insulating layer is removed. Finally, a dielectric layer and a plate electrode are formed in order on the metal storage electrode.