Abstract: A memory system includes a memory controller and a memory device. The memory device includes a first converter and a first power controller. The memory device is connected to the memory controller through a channel including at least one optical signal line. The first converter converts between at least one optical signal of the at least one optical signal line and at least one internal electrical signal of the memory device. The first power controller controls power consumption of the first converter based on an operating state of the memory device.

Abstract: A decoding method for MPEG-4 digital video having data-partitioned simple profile, and more particularly to a method of constituting an MPEG-4 video decoder having a reasonable error resilience by properly using error resistant algorithms under the circumstances where irrecoverable errors can be added at transmission channel. A method for decoding a bit stream of data-partitioned MPEG-4 video in an error-prone transmission environment characterized by comprising the steps of: searching for a start code of the following VP/VOP in an inputted bit stream; decoding the following VP/VOP headers succeeding the VP/VOP start code; checking the error existence in macroblock addresses (MBAs) using the MBAs of current VP and the following VP; scanning a VP, whose MBA range is determined through previous steps, for error-detection; and carrying out a normal decoding or an error concealment on each macroblock of current VP according to the VP scan result.