Abstract: A semiconductor device includes first pads having centers offset in a first direction, wherein the first pads are arranged in a second direction crossing the first direction; second pads separated in the first direction from the first pads and arranged in the second direction, wherein centers of the second pads are offset in the first direction; first gate lines coupled to the first pads, respectively; and second gate lines coupled to the second pads, respectively.

Abstract: A semiconductor device includes first pads having centers offset in a first direction, wherein the first pads are arranged in a second direction crossing the first direction; second pads separated in the first direction from the first pads and arranged in the second direction, wherein centers of the second pads are offset in the first direction; first gate lines coupled to the first pads, respectively; and second gate lines coupled to the second pads, respectively.

Abstract: A method for forming patterns on a wafer includes forming a fence having a sloped face in an edge portion of the wafer. The sloped face is direct to an inside of the wafer. A first photoresist layer is formed which extends to cover the fence on the wafer. First photoresist patterns are formed by performing a first exposure and development on the first photoresist layer. An etch process is performed using the first photoresist patterns and the fence as an etch mask. The fence is formed by selectively exposing a negative resist using a light shielding blade, and at this time, the first photoresist layer is formed including a positive resist.

Abstract: A method for fabricating a fine pattern includes forming a first photomask including first light transmission regions set in a line shape over a first phase shift mask (PSM) region and a first binary mask (BM) region adjacent to the first phase shift mask region. A second photomask may be formed to include second light transmission regions set in a line shape over a second phase shift mask region and a second binary mask region adjacent to the second phase shift mask region, wherein the second light transmission regions intersect the first light transmission regions. A resist layer may first be exposed using the first photomask and secondly exposed using the second photomask. The first and secondly exposed resist layer may be developed to form resist patterns with open regions corresponding to portions where the first light transmission regions intersect the second light transmission regions.

Abstract: A method for fabricating a fine pattern includes forming a first photomask including first light transmission regions set in a line shape over a first phase shift mask (PSM) region and a first binary mask (BM) region adjacent to the first phase shift mask region. A second photomask may be formed to include second light transmission regions set in a line shape over a second phase shift mask region and a second binary mask region adjacent to the second phase shift mask region, wherein the second light transmission regions intersect the first light transmission regions. A resist layer may first be exposed using the first photomask and secondly exposed using the second photomask. The first and secondly exposed resist layer may be developed to form resist patterns with open regions corresponding to portions where the first light transmission regions intersect the second light transmission regions.

Abstract: Disclosed is a photomask for forming a contact hole arranged on a wafer in a zigzag form along a transverse direction, including: a light transmitting substrate; a main pattern disposed on the light transmitting substrate with a zigzag form as an upper main pattern disposed in a relatively upper portion and a lower main pattern disposed in a relatively lower portion are arranged alternately along a transverse direction; a first lower auxiliary pattern extending in a vertical direction and disposed adjacently to a lower portion of the upper main pattern; a first upper auxiliary pattern extending in a vertical direction and disposed adjacently to an upper portion of the lower main pattern; a second lower auxiliary pattern extending in the transverse direction and connecting the first lower auxiliary patterns with each other; and a second upper auxiliary pattern extending in the transverse direction and connecting the first upper auxiliary patterns with each other.

Abstract: A method for forming patterns using a single mask includes: disposing a photo mask having a defined pattern, and performing an exposure process by controlling the focal length of an exposure apparatus to a focusing position to form a pattern having the same shape as the photo mask on the wafer; and using the same photo mask, and performing the exposure process by controlling the focal length of the exposure apparatus to a defocusing position to form a reverse pattern having a reversed image with respect to the pattern on the wafer.

Abstract: An exposure apparatus includes an exposure light source generating light to be emitted to photomask, a projection lens for projecting the light having passed through the photomask to wafer, and a transmittance adjustment filter in projection lens the transmittance adjustment filter varies the transmittance of the light projected into the projection lens as a function of position in the projection lens.

Abstract: Disclosed is a photomask for forming a contact hole arranged on a wafer in a zigzag form along a transverse direction, including: a light transmitting substrate; a main pattern disposed on the light transmitting substrate with a zigzag form as an upper main pattern disposed in a relatively upper portion and a lower main pattern disposed in a relatively lower portion are arranged alternately along a transverse direction; a first lower auxiliary pattern extending in a vertical direction and disposed adjacently to a lower portion of the upper main pattern; a first upper auxiliary pattern extending in a vertical direction and disposed adjacently to an upper portion of the lower main pattern; a second lower auxiliary pattern extending in the transverse direction and connecting the first lower auxiliary patterns with each other; and a second upper auxiliary pattern extending in the transverse direction and connecting the first upper auxiliary patterns with each other.

Abstract: A method for forming patterns on a wafer includes forming a fence having a sloped face in an edge portion of the wafer. The sloped face is direct to an inside of the wafer. A first photoresist layer is formed which extends to cover the fence on the wafer. First photoresist patterns are formed by performing a first exposure and development on the first photoresist layer. An etch process is performed using the first photoresist patterns and the fence as an etch mask. The fence is formed by selectively exposing a negative resist using a light shielding blade, and at this time, the first photoresist layer is formed including a positive resist.

Abstract: Provided is a method for verifying a pattern of a semiconductor device. In the method, a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns. Wafer patterns image contour is obtain. The image contour for wafer patterns on the designed layout are matched, After edge differences between the designed layout and the wafer patterns image contour are extracted, a checking layout for detecting wafer pattern defects is obtain by adding the edge differences on the designed layout. Defects on the checking layout is identified to verify the patterns in view of processes before fabrication of a photomask.

Abstract: An exposure apparatus for transferring patterns on a phase shift mask into a wafer according to the present invention comprises a light source, a polarized light illuminator that selectively passes through a TM mode polarized light of light from the light source to cause it to be incident onto the phase shift mask, a polarization mode translator that translates the TM mode polarized light passing through the phase shift mask into TE mode polarized light, and a lens system irradiating the TE mode polarized light from the polarization mode translator on the wafer.

Abstract: An apparatus and method for verifying the pattern of a semiconductor device provides for automatically detecting the leaning of pattern by using a design layout and the upper and the lower SEM (Scanning Electron Microscope) image of the pattern formed according to the design layout.

Abstract: Provided is a method for verifying a pattern of a semiconductor device. In the method, a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns. Wafer patterns image contour is obtain. The image contour for wafer patterns on the designed layout are matched, After edge differences between the designed layout and the wafer patterns image contour are extracted, a checking layout for detecting wafer pattern defects is obtain by adding the edge differences on the designed layout. Defects on the checking layout is identified to verify the patterns in view of processes before fabrication of a photomask.

Abstract: An exposure apparatus includes an exposure light source generating light to be emitted to photomask, a projection lens for projecting the light having passed through the photomask to wafer, and a transmittance adjustment filter in projection lens the transmittance adjustment filter varies the transmittance of the light projected into the projection lens as a function of position in the projection lens.

Abstract: A method for forming patterns using a single mask includes: disposing a photo mask having a defined pattern, and performing an exposure process by controlling the focal length of an exposure apparatus to a focusing position to form a pattern having the same shape as the photo mask on the wafer; and using the same photo mask, and performing the exposure process by controlling the focal length of the exposure apparatus to a defocusing position to form a reverse pattern having a reversed image with respect to the pattern on the wafer.

Abstract: A method of fabricating semiconductor device is provided that includes a method of forming plugs in a semiconductor device. The plugs or contacts can connect an upper conductive layer to a lower conductive layer. The plugs are preferably formed without providing contact holes. The method of fabricating a semiconductor device can include the steps of defining an active area of a device by forming a field insulating layer on a semiconductor substrate of a first conductivity type, forming a gate oxide on an exposed surface of the active layer and forming a plurality of gates and associated cap insulating layers along a first direction perpendicular to an active area. An impurity region of a second conductivity type is formed in the exposed active area of the semiconductor substrate and a plurality of sidewall spacers are formed at sides of the gates. An electrically-conductive layer is formed for contacting the impurity region between the gates on the semiconductor substrate.

Abstract: A pattern for measuring a focus of a light exposing apparatus and a method for measuring a focus of a light exposing apparatus using the pattern are disclosed. This pattern includes a plurality of linear patterns which are spaced-apart along the boundary of the holes wherein an overlap measuring pattern has a larger outer rectangular frame and a smaller inner rectangular, for thereby significantly enhancing a reproducibility and reliability of a measuring operation by automatically measuring a focus of a light exposing apparatus using an overlap measuring apparatus and thus decreasing time required for measuring the focus.

Abstract: A method for patterning a chemical amplification photoresist includes the steps of applying a photoresist film on a surface of a semiconductor substrate, exposing the photoresist film to light in an exposing apparatus, and subjecting the substrate and the photoresist to an alkaline gas having over 20 ppb for a predetermined period of time. The gas exposure step removes undesired hydrogen ions from non-exposure portions of the photoresist so that unnecessary patterns are not formed on the photoresist. For instance, the method prevents the formation of a side lobe, when fine patterns on a half-tone phase shift photomask are closely packed. Therefore the method improves a reliability of a semiconductor device.

Abstract: Provided is a method for verifying a pattern of a semiconductor device. In the method, a designed layout of target patterns is provided, and transferring the designed layout on a wafer to form wafer patterns. Wafer patterns image contour is obtain. The image contour for wafer patterns on the designed layout are matched, After edge differences between the designed layout and the wafer patterns image contour are extracted, a checking layout for detecting wafer pattern defects is obtain by adding the edge differences on the designed layout. Defects on the checking layout is identified to verify the patterns in view of processes before fabrication of a photomask.