Abstract: A pixel array of an image sensor includes a substrate, a chromatic pixel including a first photodiode formed in the substrate and a color filter formed over the first photodiode, and an achromatic pixel including a second photodiode formed in the substrate, the second photodiode having a nano pillar pattern at a surface region of the substrate.

Abstract: An internal voltage generation circuit includes a charging unit suitable for charging electrical charges for a time corresponding to a control signal; a charge control unit suitable for generating the control signal, which is activated for a time corresponding to temperature information, and controlling a charging operation of the charging unit; and an output unit suitable for generating an internal voltage based on charge amount by the charging operation.

Abstract: A voltage generation circuit may include: a comparison unit configured to compare a reference voltage and a feedback voltage and output a comparison signal to a node; an output unit configured to generate an internal voltage and the feedback voltage according to a voltage level applied to the node; and a control unit configured to discharge the node when a level of the internal voltage drops to less than a preset level.

Abstract: An image sensor including: a plurality of pixels, wherein a first pixel of the pixels includes: a first photoelectric conversion element; and a first microlens overlapping the first photoelectric conversion element, wherein the first microlens reflects wavelengths of a first region of visible light and allows wavelengths of second and third regions of visible light to pass through to the first photoelectric conversion element.

Abstract: A voltage generation circuit may include: a comparison unit configured to compare a reference voltage and a feedback voltage and output a comparison signal to a node; an output unit configured to generate an internal voltage and the feedback voltage according to a voltage level applied to the node; and a control unit configured to discharge the node when a level of the internal voltage drops to less than a preset level.

Abstract: A current generation circuit includes a mirroring circuit suitable for being charged by using a bias voltage, wherein a voltage level of the charged voltage varies corresponding to changes in a voltage level of a power voltage, a comparison circuit suitable for comparing the charged voltage with a feedback voltage, and a current driving circuit suitable for generating a current based on a voltage output from the comparison circuit.

Abstract: A pixel array of an image sensor includes a substrate, a chromatic pixel including a first photodiode formed in the substrate and a color filter formed over the first photodiode, and an achromatic pixel including a second photodiode formed in the substrate, the second photodiode having a nano pillar pattern at a surface region of the substrate.

Abstract: A dynamic vision sensor includes a sensing pixel array including a plurality of sensing pixels each detecting a change of light intensity to output an event by a unit of time-stamp and a control unit that controls the sensing pixel array. Here, each of the sensing pixels has an inclined N-polygon shape, where N is an even number greater than or equal to 4. In addition, each of the sensing pixels includes first sides extended in a first direction that stand opposite to each other in a second direction in a staggered form and second sides extended in the second direction that stand opposite to each other in the first direction in a staggered form, where the first direction is perpendicular to the second direction.

Abstract: An internal voltage generation circuit includes a charging unit suitable for charging electrical charges for a time corresponding to a control signal; a charge control unit suitable for generating the control signal, which is activated for a time corresponding to temperature information, and controlling a charging operation of the charging unit; and an output unit suitable for generating an internal voltage based on charge amount by the charging operation.

Abstract: An image sensor including: a plurality of pixels, wherein a first pixel of the pixels includes: a first photoelectric conversion element; and a first microlens overlapping the first photoelectric conversion element, wherein the first microlens reflects wavelengths of a first region of visible light and allows wavelengths of second and third regions of visible light to pass through to the first photoelectric conversion element.

Abstract: A current generation circuit includes a mirroring circuit suitable for being charged by using a bias voltage, wherein a voltage level of the charged voltage varies corresponding to changes in a voltage level of a power voltage, a comparison circuit suitable for comparing the charged voltage with a feedback voltage, and a current driving circuit suitable for generating a current based on a voltage output from the comparison circuit.

Abstract: The page buffer of a nonvolatile memory device utilizing a double verification method using first and second verification voltages when performing a program verification operation includes a first latch unit including a first latch configured to store input data and results of a program operation and a first verification operation using the first verification voltage, and a second latch unit including a second latch configured to have a higher latch trip point than the first latch and to store a result of a second verification operation using the second verification voltage, which is less than the first verification voltage, when the first verification operation is performed.

Abstract: The page buffer of a nonvolatile memory device utilizing a double verification method using first and second verification voltages when performing a program verification operation includes a first latch unit including a first latch configured to store input data and results of a program operation and a first verification operation using the first verification voltage, and a second latch unit including a second latch configured to have a higher latch trip point than the first latch and to store a result of a second verification operation using the second verification voltage, which is less than the first verification voltage, when the first verification operation is performed.