Abstract: A display device comprises a substrate, a semiconductor layer thereon, a first insulating layer on the semiconductor layer, a first conductive layer on the first insulating layer and including a first electrode pattern, a second insulating layer on the first insulating layer and including first and second conductive patterns, a third insulating layer on the second conductive layer, and a display element layer on the third insulating layer and including a first pixel electrode connected to the first conductive pattern through a first via hole, a second pixel electrode connected to the second conductive pattern through a second via hole, and a micro light-emitting element between the pixel electrodes, the first conductive pattern contacting the semiconductor layer through a first contact hole and the first electrode pattern through a second contact hole, and the second conductive pattern overlapping the first electrode pattern to form a first capacitor therewith.

Abstract: A pixel circuit includes: a first transistor including a gate electrode connected to a first node, a source electrode connected to a first power line, and a drain electrode connected to a second power line; a light emitting element connected between the first transistor and the first or second power line; a second transistor connected between a data line and the first node, and including a gate electrode connected to a first scan line; a first capacitor connected between the first node and the source electrode of the first transistor; a third transistor connected between the first node and the first power line, and including a gate electrode connected to a second node; a fourth transistor connected between the second node and the data line, and including a gate electrode connected to a second scan line; and a second capacitor connected between the second node and a first control line.

Abstract: A pixel including: a light emitting element; a first transistor connected between a first power source and a second node; a first capacitor connected to a first node or a second node and a third node; a second transistor between the third node and a data line, the second transistor turned on by a first scan signal; a third transistor between the first and second nodes, the third transistor turned on by a second scan signal; a fifth transistor between the first power source and the first transistor, the fifth transistor turned on by a first emission control signal; a sixth transistor between the second node and the light emitting element, the sixth transistor turned on by a second emission control signal; and an eighth transistor between the second node and a second emission control line, the eighth transistor turned on by a fourth scan signal.

Abstract: A display device includes a scan write line, a PWM emission line, a PAM emission line, a sweep signal line, a first data line, a second data line, and a subpixel connected thereto, and including a light emitting element, a first pixel driver to supply a control current to a node according to the first data voltage in response to the PWM emission signal, a second pixel driver to generate a driving current according to the second data voltage in response to the PWM emission signal, and a third pixel driver to supply the driving current to the light emitting element according to the PAM emission signal and a voltage of the node, wherein the PWM emission signal includes a plurality of PWM pulses, the PAM emission signal includes a plurality of PAM pulses, and a number of the PWM pulses is greater than a number of the PAM pulses.

Abstract: An emissive display device includes a display area which includes a plurality of pixels, and a driver disposed at a side of the display area, where the driver includes at least two emission signal stages disposed in one row, and an input signal line connected to the emission signal stages, and the at least two emission signal stages are connected to the same input signal line.

Abstract: A display device includes connection lines, pulse amplitude modulation (PAM) data lines configured to receive pulse width modulation (PWM) data voltages, PWM data lines configured to receive the PWM data voltages, a first connection control line configured to receive a first connection control signal, a second connection control line configured to receive a second connection control signal, subpixels connected to the PWM data lines and the PAM data lines, and a first demultiplexer (demux) unit configured to connect the connection lines to the PAM data lines or to the PWM data lines according to the first connection control signal and the second connection control signal.

Abstract: A display device including: a first transistor configured to control a control current based on a voltage of a first node; a second transistor configured to electrically connect a second node that is a first electrode of the first transistor to a first data line in response to a scan write signal; a third transistor configured to control a driving current based on a voltage of a third node; a fourth transistor configured to electrically connect a fourth node that is a first electrode of the third transistor to a second data line in response to the scan write signal; a fifth transistor configured to control the driving current based on a voltage of a fifth node having received the control current; and a light emitting element configured to receive the driving current, wherein the fifth transistor is of a different type from that of the first to fourth transistors.

Abstract: A peptide with terminal tyrosine has an excellent effect on inhibiting protein nitration and also an excellent effect on preventing, ameliorating, or treating disease symptoms in chronic immobilization stress-induced depression/cognitive impairment model, Alzheimer's disease model, epileptic seizure model, stroke model, type 2 diabetes model, acute renal failure model, or hyperammonemia model.

Abstract: A display device includes: first sub-pixels commonly connected to a first global data line, each including a first light emitting element to emit light of a first color; and second sub-pixels commonly connected to a second global data line different from the first global data line, each including a second light emitting element to emit light of a second color different from the first color. At least one of the first sub-pixels includes: a first circuit to supply a driving current to the first light emitting element based on a first global data voltage received from the first global data line; a second circuit to control a supply period of the driving current based on a data voltage received from a data line; and a test transistor including a first electrode connected to an anode of the first light emitting element, and a second electrode connected to the data line.

Abstract: A display device includes PAM data lines receiving PAM and PWM data voltages, and sub-pixels connected to the PAM and PWM data lines. A sub-pixel includes a light emitting element, a first pixel driver to supply a control current according to one of the PAM data voltages to a node, a second pixel driver to generate a driving current according to one of the PWM data voltages, and a third pixel driver to adjust a period during which the driving current is supplied to the light emitting element according to a voltage of the node. A peak current value of the driving current when the sub-pixel emits a light corresponding to a low gray level region is smaller than a peak current value of the driving current when the sub-pixel emits a light corresponding to a high gray level region higher than the low gray level region.

Abstract: A pixel including: a light emitting element; a first transistor connected between a first power source and a second node; a first capacitor connected to a first node or a second node and a third node; a second transistor between the third node and a data line, the second transistor turned on by a first scan signal; a third transistor between the first and second nodes, the third transistor turned on by a second scan signal; a fifth transistor between the first power source and the first transistor, the fifth transistor turned on by a first emission control signal; a sixth transistor between the second node and the light emitting element, the sixth transistor turned on by a second emission control signal; and an eighth transistor between the second node and a second emission control line, the eighth transistor turned on by a fourth scan signal.

Abstract: A sweep signal driver includes: a kth stage to output a kth emission signal to a kth emission line, and a kth sweep signal to a kth sweep signal line, the kth stage including: first, second, and third pull-up nodes; a node connection circuit between the first pull-up node and the second pull-up node, and between the first pull-up node and the third pull-up node; a first output circuit to output a sweep clock signal of a sweep clock terminal to a first output terminal connected to the kth sweep signal line when the third pull-up node has a gate-on voltage; and a second output circuit to output a gate-on voltage to a second output terminal connected to the kth emission line when the second pull-up node has a gate-on voltage. A pulse of the kth sweep signal linearly changes from a gate-off voltage to the gate-on voltage.

Abstract: A light emitting diode display device includes: a pixel circuit; a data line connected to the pixel circuit to transmit a data voltage; an anode on the pixel circuit and the data line; an emission layer on the anode; and a cathode on the emission layer. The anode includes a first anode and a second anode, and the data line extends across the first anode and the second anode.

Abstract: A display device may include a plurality of pixels each including a light emitting element. A first scan line and a second scan line are disposed in each of the pixels. A data line is disposed in each of the pixels. A power line is disposed in each of the pixels. A reference voltage line is disposed in each of the pixels. A first transistor controls a current of the light emitting element. A second transistor is connected between the data line and a first gate electrode of the first transistor. A third transistor is connected between the reference voltage line and a first electrode of the first transistor. A fourth transistor is connected between the power line and a second electrode of the first transistor. The fourth transistor may be a transistor of a type different from that of the first to third transistors.

Abstract: A display device includes a scan write line, a PWM emission line, a PAM emission line, a sweep signal line, a first data line, a second data line, and a subpixel connected thereto, and including a light emitting element, a first pixel driver to supply a control current to a node according to the first data voltage in response to the PWM emission signal, a second pixel driver to generate a driving current according to the second data voltage in response to the PWM emission signal, and a third pixel driver to supply the driving current to the light emitting element according to the PAM emission signal and a voltage of the node, wherein the PWM emission signal includes a plurality of PWM pulses, the PAM emission signal includes a plurality of PAM pulses, and a number of the PWM pulses is greater than a number of the PAM pulses.

Abstract: A display device includes a first pixel driver connected to a sweep line, the first pixel driver generating a control current based on a first data voltage, a second pixel driver connected to a scan control line, the second pixel driver generating a driving current based on a second data voltage and controlling a period for which the driving current flows, based on the control current, and a light-emitting element connected to the second pixel driver to receive the driving current. The first pixel driver includes a first transistor generating the control current based on the first data voltage, a second transistor providing the first data voltage to a first electrode of the first transistor based on a scan write signal, and a first capacitor including a first capacitor electrode connected to a gate electrode of the first transistor, and a second capacitor electrode connected to the sweep line.

Abstract: A display device includes connection lines, pulse amplitude modulation (PAM) data lines configured to receive pulse width modulation (PWM) data voltages, PWM data lines configured to receive the PWM data voltages, a first connection control line configured to receive a first connection control signal, a second connection control line configured to receive a second connection control signal, subpixels connected to the PWM data lines and the PAM data lines, and a first demultiplexer (demux) unit configured to connect the connection lines to the PAM data lines or to the PWM data lines according to the first connection control signal and the second connection control signal.

Abstract: A display device includes: a plurality of first pixels connected to first scan lines and a first data line, a plurality of second pixels connected to second scan lines and the first data line, a plurality of third pixels connected to the first scan lines or the second scan lines and a second data line, and a scan driver including a plurality of stages which supplies scan signals to one of the first scan lines and the second scan lines.

Abstract: A pixel and a display device including the same are disclosed. The pixel includes a light emitting element, first through seventh transistors, and a first capacitor. The first transistor is connected between first and second nodes. The second transistor is connected between a data line and a fourth node and configured to be turned on by a first scan signal. The third transistor is connected between the first node and a third node and configured to be turned on by a second scan signal. The fourth transistor is connected between the fourth node and a third power line and configured to be turned on by a third scan signal. The fifth transistor is connected between the third node and the third power line and configured to be turned on by a fourth scan signal. The sixth transistor is connected between the first node and a fifth node and configured to be turned off by an emission control signal.

Abstract: A method for ameliorating or treating brain damage and mild cognitive impairment includes administering a composition including glutamine or a salt thereof as effective component to a subject in need thereof. Glutamine as the effective component not only can restore the memory and cognitive ability impaired by stress but also can suppress a damage on nerve cells, reduce the amount of ROS/RNS and other related proteins in brain tissues, and enhance synaptic plasticity. When the animal model of Alzheimer's disease is fed with glutamine, cognitive ability of the animal is improved and accumulation of A?42 is suppressed.