Abstract: There is provided a method of manufacturing a stack package. The method includes vertically stacking core dies on a base die wafer to provide a stack structure, forming partition walls on the base die wafer to surround the stack structure, and forming an underfill material layer that includes under-filling portions filling gaps between the core dies, and filling fillet portions covering side surfaces of the core dies. The fillet portions are formed to have a width confined by the partition walls. The partition walls are removed, and a mold layer is formed to cover the fillet portions. Related stack packages are also provided.

Abstract: A semiconductor device includes a through electrode penetrating a substrate such that a first end portion of the through electrode protrudes from a first surface of the substrate, a passivation layer covering the first surface of the substrate and a sidewall of the first end portion of the through electrode, a bump having a lower portion penetrating the passivation layer and coupled to the first end portion of the through electrode, and a lower metal layer disposed between the bump and the first end portion of the through electrode. The lower metal layer extends onto a sidewall of the bump and has a concave shape.

Abstract: A semiconductor device includes a through electrode penetrating a substrate such that a first end portion of the through electrode protrudes from a first surface of the substrate, a passivation layer covering the first surface of the substrate and a sidewall of the first end portion of the through electrode, a bump having a lower portion penetrating the passivation layer and coupled to the first end portion of the through electrode, and a lower metal layer disposed between the bump and the first end portion of the through electrode. The lower metal layer extends onto a sidewall of the bump and has a concave shape.

Abstract: The present invention provides a method of dry etching capable of improving an etch selectivity of an etch target against a photoresist pattern during a process for etching a dielectric layer. The inventive method includes the steps of: forming an etch target layer on a substrate; forming a photoresist pattern on the etch target layer; and etching etch target layer by using the photoresist pattern as an etch mask and a mixed gas of C4F6 and CH2F2.