Patents by Inventor Hyun Mo Ku

Hyun Mo Ku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11723143
    Abstract: A system and method for dissipating heat from a package and reducing interference between signaling pins is disclosed. The system includes a circuit substrate that includes a dielectric layer and at least one metal layer having an external surface. A plurality of metal posts is disposed on the external surface that function to a least one of dissipate heat from the circuit substrate, shield interfering signals between the signaling pins, and interact with mounting substrates on corresponding componentry. One or more metal posts are merged, increasing the interference shielding and heat dissipation functions of the metal posts.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: August 8, 2023
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Chang Kyu Choi, Hyun Mo Ku, Sarah Kay Haney, Li Sun
  • Patent number: 9974181
    Abstract: A module includes a printed circuit board (PCB) having a substrate, component pads on a top surface of the substrate, and contact pads formed on a bottom surface of the substrate. The module further includes a mold compound disposed over the PCB; an external shield disposed over a top surface of the mold compound and on side surfaces of the mold compound and the PCB, where the external shield is configured to provide shielding of at least one component connected to at least one component pad from electromagnetic radiation; and a back-spill barrier formed on the bottom of the substrate. The back-spill barrier surrounds the contact pads, and is configured to prevent the external shield from making contact with the contact pads.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: May 15, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Sarah Haney, Deog Soon Choi, Hyun Mo Ku, Lea-Teng Lee, Nitesh Kumbhat, Ah Ron Lee
  • Patent number: 9972592
    Abstract: A semiconductor package and methods for producing the same are described. One example of the semiconductor package is described to include a substrate having a first face and an opposing second face. The package is further described to include a plurality of solderable surfaces formed on the first face of the substrate, a first solderable surface in the plurality of solderable surfaces having a pattern plating structure on an outward facing surface of the first solderable surface. There may also be an amount of solder bonded to the outward facing surface of the first solderable surface, where the pattern plating structure on the outward facing surface of the first solderable surface causes the amount of solder to have a first thickness at its ends, a second thickness at its center, and a discrete transition between the first thickness and the second thickness.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: May 15, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Ah Ron Lee, Deog Soon Choi, Hyun-Mo Ku
  • Patent number: 9972590
    Abstract: A semiconductor package and methods for producing the same are described. One example of the semiconductor package is described to include a substrate having a first face and an opposing second face. The package is further described to include a plurality of pads disposed on the first face of the substrate, each of the plurality of pads including a first face and an opposing second face that is in contact with the first face of the substrate. The semiconductor package is further described to include a plurality of solder-on-pad structures provided on a first of the plurality of pads.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: May 15, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Deog Soon Choi, Ah Ron Lee, Hyun-Mo Ku
  • Publication number: 20180063951
    Abstract: A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
    Type: Application
    Filed: August 30, 2016
    Publication date: March 1, 2018
    Inventors: Nitesh Kumbhat, Li Sun, Aaron Lee, Deog-Soon Choi, Hyun-Mo Ku, Jack Ajoian
  • Patent number: 9907169
    Abstract: A process for forming an encapsulating mold compound into a molded solder mask on a bottom surface of a PCB is provided that allows the molded solder mask to have a very precise, preselected thickness, or height, while also ensuring that no gaps between the solder mask and side walls of the electrical contact pads exist. A circuit board and circuit board assembly that incorporate the molded solder mask are also provided. The molded solder mask is fabricated in such a way that overlap between the molded solder mask and the electrical contact pads and gaps between the molded solder mask and the side walls of the electrical contact pads are avoided. In addition, the molded solder mask allows the pitch between adjacent electrical contact pads to be greatly reduced compared to the pitch that is possible using a traditional solder mask formed by the traditional photolithographic approach.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: February 27, 2018
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Nitesh Kumbhat, Li Sun, Aaron Lee, Deog-Soon Choi, Hyun-Mo Ku, Jack Ajoian
  • Publication number: 20170280561
    Abstract: A module includes a printed circuit board (PCB) having a substrate, component pads on a top surface of the substrate, and contact pads formed on a bottom surface of the substrate. The module further includes a mold compound disposed over the PCB; an external shield disposed over a top surface of the mold compound and on side surfaces of the mold compound and the PCB, where the external shield is configured to provide shielding of at least one component connected to at least one component pad from electromagnetic radiation; and a back-spill barrier formed on the bottom of the substrate. The back-spill barrier surrounds the contact pads, and is configured to prevent the external shield from making contact with the contact pads.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 28, 2017
    Inventors: Sarah Haney, Deog Soon Choi, Hyun Mo Ku, Lea-Teng Lee, Nitesh Kumbhat, Ah Ron Lee
  • Patent number: 9693445
    Abstract: A PCB includes a copper seed layer, a dielectric layer provided on the copper seed layer, a first thermal via and a plurality of second thermal vias disposed around the first thermal via. The first thermal via has a first through-hole in the dielectric layer and a first copper portion filled in the first through-hole, and each of the second thermal vias has a second through-hole in the dielectric layer and a second copper portion filled in the second through-hole. A mounting portion configured to mount a semiconductor device thereon is provided on the first copper portion.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 27, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Hyun Mo Ku, Jin Jeong, Deog Soon Choi, Chris Chung
  • Publication number: 20160227641
    Abstract: A PCB includes a copper seed layer, a dielectric layer provided on the copper seed layer, a first thermal via and a plurality of second thermal vias disposed around the first thermal via. The first thermal via has a first through-hole in the dielectric layer and a first copper portion filled in the first through-hole, and each of the second thermal vias has a second through-hole in the dielectric layer and a second copper portion filled, in the second through-hole. A mounting portion configured to mount a semiconductor device thereon is provided on the first copper portion.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 4, 2016
    Inventors: Hyun Mo Ku, Jin Jeong, Deog Soon Choi, Chris Chung
  • Publication number: 20160204077
    Abstract: An electronic device is manufactured by providing a substrate on which a pad including an organic solderability preservative (OSP) film is formed, mounting a die on the substrate such that the die is electrically connected to the pad, performing a molding process on the die mounted on the substrate, and thereafter, forming an oxide film on the substrate by using an oxidation process on the substrate.
    Type: Application
    Filed: January 14, 2015
    Publication date: July 14, 2016
    Inventors: Hyun Mo Ku, Jin Jeong, Deog Soon Choi, Chris Chung