Patents by Inventor Hyun-og Byun

Hyun-og Byun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device including ion implantion compensation region in cell array region
    Patent number: 6730952
    Abstract: A first mask which is formed which exposes a cell array region and a peripheral circuit region of a semiconductor substrate. The cell array region and the peripheral circuit region are of a same conductive MOS type. Then, a preceding ion implantation process is implemented in both the cell array region and the peripheral circuit region utilizing the first mask. The preceding ion implantation process has ion implantation parameters corresponding to first implantation design specifications of one of the cell array region and the peripheral circuit region. Then, a second mask is formed which shields the one of the cell array region and the peripheral circuit region and which exposes the other of the cell array region and the peripheral circuit region. A subsequent ion implantation process is then implemented in the other of the cell array region and the peripheral circuit region utilizing the second mask.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: May 4, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyun-Og Byun
  • Semiconductor device and method of manufacturing the same
    Patent number: 6518149
    Abstract: A first mask which is formed which exposes a cell array region and a peripheral circuit region of a semiconductor substrate. The cell array region and the peripheral circuit region are of a same conductive MOS type. Then, a preceding ion implantation process is implemented in both the cell array region and the peripheral circuit region utilizing the first mask. The preceding ion implantation process has ion implantation parameters corresponding to first implantation design specifications of one of the cell array region and the peripheral circuit region. Then, a second mask is formed which shields the one of the cell array region and the peripheral circuit region and which exposes the other of the cell array region and the peripheral circuit region. A subsequent ion implantation process is then implemented in the other of the cell array region and the peripheral circuit region utilizing the second mask.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: February 11, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyun-Og Byun
  • Semiconductor device and method of manufacturing the same
    Publication number: 20030011034
    Abstract: A first mask which is formed which exposes a cell array region and a peripheral circuit region of a semiconductor substrate. The cell array region and the peripheral circuit region are of a same conductive MOS type. Then, a preceding ion implantation process is implemented in both the cell array region and the peripheral circuit region utilizing the first mask. The preceding ion implantation process has ion implantation parameters corresponding to first implantation design specifications of one of the cell array region and the peripheral circuit region. Then, a second mask is formed which shields the one of the cell array region and the peripheral circuit region and which exposes the other of the cell array region and the peripheral circuit region. A subsequent ion implantation process is then implemented in the other of the cell array region and the peripheral circuit region utilizing the second mask.
    Type: Application
    Filed: August 29, 2002
    Publication date: January 16, 2003
    Inventor: Hyun-Og Byun
  • Ion implanter with impurity interceptor which removes undesired impurities from the ion beam
    Patent number: 6177679
    Abstract: An ion implanter which prevents undesired impurities from being implanted into a wafer has an ion source for producing an ion beam which is to be implanted into a wafer, an accelerator for accelerating the ion beam, and an impurity interceptor for intercepting impurities generated in the accelerator. The impurity interceptor has an intercepting plate electrically connected to a high voltage power supply, and an opening formed in the center of the plate. Undesired ions having an energy lower than the high voltage applied to the intercepting plate are intercepted, and only those desired ions having an energy higher than the high voltage applied to the intercepting plate pass through the opening.
    Type: Grant
    Filed: January 21, 1999
    Date of Patent: January 23, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-og Byun, Yun-mo Yang