Patents by Inventor Hyun-Ryong Lee

Hyun-Ryong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8184714
    Abstract: Techniques, systems and apparatus for digital information processing are described. In particular, techniques, systems and apparatus are described for reducing the size of buffer memory used. In one aspect, a digital video codec includes a buffer memory including an individual area to individually record different Minimum Coded Block (MCB) line data, and a common area to commonly record the different MCB line data. The codec also includes video encoder connected to the buffer memory to encode video data recorded in the individual area and the common area. Further, the codec includes a memory controller connected to the buffer memory to divisionally record a MCB line data in the individual area and the common area, and during encoding of the MCB line data, record another MCB line data in an encoding-completed area of the common area in a recording type corresponding to a memory structure of the encoding-completed common area.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: May 22, 2012
    Assignee: Core Logic, Inc.
    Inventors: Chang-Hwan Shon, Hye-Kyung Kim, Hyun-Ryong Lee
  • Publication number: 20080273598
    Abstract: Techniques, systems and apparatus for digital information processing are described. In particular, techniques, systems and apparatus are described for reducing the size of buffer memory used. In one aspect, a digital video codec includes a buffer memory including an individual area to individually record different Minimum Coded Block (MCB) line data, and a common area to commonly record the different MCB line data. The codec also includes video encoder connected to the buffer memory to encode video data recorded in the individual area and the common area. Further, the codec includes a memory controller connected to the buffer memory to divisionally record a MCB line data in the individual area and the common area, and during encoding of the MCB line data, record another MCB line data in an encoding-completed area of the common area in a recording type corresponding to a memory structure of the encoding-completed common area.
    Type: Application
    Filed: March 24, 2008
    Publication date: November 6, 2008
    Applicant: Core Logic, Inc.
    Inventors: Chang-Hwan Shon, Hye-Kyung Kim, Hyun-Ryong Lee