Patents by Inventor Hyun Shin

Hyun Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6104095
    Abstract: A printed circuit board (PCB) for use in chip-on-board (COB) packages reduces failures due to warping of the COB packages. The PCB includes a board body having a upper surface and a lower surface, a chip bonding area on the upper surface for attaching a semiconductor device, and a plurality of conductors in a circuit pattern on the upper surface outside the chip bonding area, for electrical connection to the semiconductor device using a plurality of bonding wires. An encapsulation region encloses the chip bonding area, the bonding wires, a portion of the plurality of conductors, and a portion of the upper surface. The board includes external contacts on the lower surface for electrical connections to an external electrical appliance, and via holes through the board body for electrically connecting the plurality of conductors in the circuit pattern to the external contacts.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: August 15, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo Hyun Shin, Min Cheol An
  • Patent number: 6028774
    Abstract: A base card improves the mounting reliability of a COB package particularly when the package has molding by-products such as epoxy burrs or molding flashes. The base card has a COB package receiving part made up of first and second sections. The receiving part is stepped so that the sections thereof have shapes that are complementary to that of and for receiving a peripheral portion of the printed circuit board of the COB package and the package body the COB package, respectively. The second section has a bevel at the transition of the first section into the second section. This bevel helps define a space in which the by-products are accommodated when the COB package is mounted to the base card. Further, the second section of the COB package receiving part may define an opening in the bottom surface of the base card.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: February 22, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bo Hyun Shin, Jung Hwan Cuun, Min Cheol An
  • Patent number: 5824689
    Abstract: The jineol extracted from scolopendra subspinipes is represented as the following formula (I): ##STR1## The jineol is obtained from scolopendra subspinipes by extracting scolopendra subspinipes with a solvent, separating an activating portion from the extracted liquid with an organic solvent, and purifying an anticancerous activating portion from the activating portion by chromatography.The jineol derivatives prepared from the jineol extracted scolopendra subspinipes are represented as the following formula (II): ##STR2## wherein each R.sub.1 and R.sub.2, independently of each other, is a hydrogen; a lower alkyl group of C.sub.1 to C.sub.6 ; a cycloalkyl group of C.sub.5 to C.sub.7 having a substituting group; an alkyl group of C.sub.1 to C.sub.4 having a phenyl group with one to three substituting groups; a lower alkyl group of C.sub.1 to C.sub.6 having a hydroxy, an alkoxy having C.sub.1 to C.sub.5, or an aryloxy; a lower acyl group of C.sub.1 to C.sub.7 having a hydroxy, an alkoxy having C.sub.1 to C.sub.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: October 20, 1998
    Assignee: Samsung General Chemicals Co., Ltd.
    Inventors: Ho-Seong Lee, Young-Jun Park, Min-Hwan Kim, Seok-Shik Moon, Nam-Sun Cho, Jong-Hyun Shin, Young-Whan Suh, Jung-Ok Lee
  • Patent number: 5818091
    Abstract: A semiconductor device includes a connection pad layer for securing a contact margin which is formed on a first conductivity-type area whereas electrodes are connected directly through openings on a second conductivity-type area without the connection pad layer. A device fabricated according to this structure yields improved punch-through and junction depth characteristics.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: October 6, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hee Lee, Young-woo Seo, Jung-hyun Shin
  • Patent number: 5591670
    Abstract: A highly integrated semiconductor device and method for manufacturing the same are disclosed. The device has a self-aligned contact structure for increasing a contact margin upon forming a self-aligned buried contact hole. An oxide film of an upper portion of a gate electrode is chamfered in order to form a self-aligned buried contact hole. Therefore, a self-aligned contact hole can be formed without enhancing the step, and as a result, the step between the cell and the peripheral portion of the cell can be reduced.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 7, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-mo Park, Jung-hyun Shin, Young-hun Park
  • Patent number: 5516996
    Abstract: A keyboard apparatus according to this invention has a key button being formed with a key stem in a body to directly assemble with a key holder and separate from it. The key apparatus has a movable contact and a fixed contact of membrane structure, and has a key switch above the contact portion. The key switch comprises a rubber spring being formed above the contact position, a key holder to receive and guide a key button from upper side, and key button.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: May 14, 1996
    Assignee: BTC Corporation
    Inventor: Young-Hyun Shin
  • Patent number: 5502336
    Abstract: A highly integrated semiconductor device and method for manufacturing the same are disclosed. The device has a self-aligned contact structure for increasing a contact margin upon forming a self-aligned buried contact hole. An oxide film of an upper portion of a gate electrode is chamfered in order to form a self-aligned buried contact hole. Therefore, a self-aligned contact hole can be formed without enhancing the step, and as a result, the step between the cell and the peripheral portion of the cell can be reduced.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: March 26, 1996
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-mo Park, Jung-hyun Shin, Young-hun Park
  • Patent number: 5484739
    Abstract: A semiconductor device and manufacturing method thereof is disclosed in which a connection pad layer for securing a contact margin is formed on a first conductivity-type area whereas electrodes are connected directly through openings on a second conductivity-type area without the connection pad layer. In the method, an insulating layer is formed on the overall surface of a substrate. Using a mask pattern for exposing the first conductivity-type area, the insulating layer placed on an exposed portion is anisotropically etched so that the remaining insulating layer serves as an impurity-implantation preventing mask in a succeeding first conductivity-type impurity implantation step. A material layer for the connection pad layer is formed prior to the impurity-implantation step and patterned after the impurity implantation.
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: January 16, 1996
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hee Lee, Young-woo Seo, Jung-hyun Shin
  • Patent number: 5364809
    Abstract: A method of fabricating a multi-chamber type DRAM cell capacitor having high capacitance within a limited area. A first concave area (54) of the storage electrode (72) is formed by means of an oxide film (46) as a scarifying layer. An insulating spacer (58) is formed in the first concave area (54). Then, first and second conduction layers (48, 60) are formed on the substrate (26) and top portions of the conduction layers are removed consecutively, so as to form a capacitor having a plurality of concave areas.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: November 15, 1994
    Assignee: SamSung Electronics Co., Ltd.
    Inventors: Oh-Hyun Kwon, Taek-Yong Jang, Joong-Hyun Shin, Kyoung-Seok Oh
  • Patent number: 5292335
    Abstract: An infant pacifier with a diaphragm melody generator in which only when the infant holds the pacifier in the mouth and sucks or mumbles, a diaphragm switch of the melody generator is operated in order to permit the generator to generate melody. The present pacifier comprises a nipple part for being held by the infant mouth, a handle part for permitting the pacifier to be handled and a melody generator. The melody generator comprises a diaphragm switch for turning on/off the melody generator in accordance with the holding force and an electronic circuit board for generating the melody in cooperation with the diaphragm switch when the infant holds the nipple part of the pacifier in the mouth. The diaphragm switch is applied with conductive ink at its center and easily expanded and contracted by the holding force.
    Type: Grant
    Filed: October 2, 1992
    Date of Patent: March 8, 1994
    Inventor: Jong-Hyun Shin
  • Patent number: 5073510
    Abstract: According to the present invention, the incomplete silicon exposure is prevented by the sufficient overetching after the formation of an etching-stop layer on an oxide layer for protecting a conductive layer from the damage of the protective oxide layer when the self-aligned contact window is formed. Therefore, the thickness of the protective oxide layer can be minimized, and the bend of the chip can be improved whereby the following process will be accomplished easily.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: December 17, 1991
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-Hyun Kwon, Taek-Yong Jang, Jung-Hyun Shin, Won-Taek Choi
  • Patent number: 5005103
    Abstract: A method of manufacturing folded capacitors comprises the steps of: forming a first storage electrode and a first insulating layer; forming a first plate electrode and a second insulating layer thereon and forming a pad poly thereon; limiting the first plate electrode to a predetermined portion; leaving a spacer; forming a second storage electrode; and depositing a third insulating layer and a second plate electrode thereon. It is possible to manufacture a capacitor with a large capacitance and to simplify the manufacturing processes of the capacitor by using the conventional capacitor manufacturing processes. The folded capacitors with a larger capacitance per unit area can be obtained without making the insulating layer be thinned even if the plane area of the capacitor may be reduced remarkably according to a tendency to high integration density.
    Type: Grant
    Filed: June 5, 1990
    Date of Patent: April 2, 1991
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-Hyun Kwon, Taek-Yong Jang, Jung-Hyun Shin, Won-Taek Choi