Abstract: A three-dimensional semiconductor device includes a first channel pattern on and spaced apart from a substrate, the first channel pattern having a first end and a second end that are spaced apart from each other in a first direction parallel to a top surface of the substrate, and a first sidewall and a second sidewall connecting between the first end and the second end, the first and second sidewalls being spaced apart from each other in a second direction parallel to the top surface of the substrate, the second direction intersecting the first direction, a bit line in contact with the first end of the first channel pattern, the bit line extending in a third direction perpendicular to the top surface of the substrate, and a first gate electrode adjacent to the first sidewall of the first channel pattern.

Abstract: A three-dimensional semiconductor device includes a first channel pattern on and spaced apart from a substrate, the first channel pattern having a first end and a second end that are spaced apart from each other in a first direction parallel to a top surface of the substrate, and a first sidewall and a second sidewall connecting between the first end and the second end, the first and second sidewalls being spaced apart from each other in a second direction parallel to the top surface of the substrate, the second direction intersecting the first direction, a bit line in contact with the first end of the first channel pattern, the bit line extending in a third direction perpendicular to the top surface of the substrate, and a first gate electrode adjacent to the first sidewall of the first channel pattern.

Abstract: A floating gate type nonvolatile memory device comprises a semiconductor layer, wordlines crossing over the semiconductor layer, and a memory element disposed between the wordlines and facing the semiconductor layer.

Abstract: Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.

Abstract: A programming method of a nonvolatile memory device is provided including: applying a local voltage to a first unselected word line; applying a local voltage to a second unselected word line, after the local voltage is applied to the first unselected word line; and applying a pass voltage to the first unselected word line, after the local voltage is applied to the second unselected word line. Related devices and systems are also provided herein.

Abstract: A non-volatile memory device includes a substrate including a plurality of active regions and a plurality of device isolating trenches formed between a respective one of each of the active regions along a first direction in the substrate. A plurality of gate structures each including a tunnel insulating layer pattern, a floating gate electrode, a dielectric layer pattern and a control gate electrode is formed on the substrate. A first insulating layer pattern is provided within the device isolating trenches. A second insulating layer pattern is formed along an inner surface portion of a gap between the gate structures. An impurity doped polysilicon pattern is formed on the second insulating layer pattern in the gap between the gate structures.

Abstract: Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.

Abstract: A nonvolatile memory device includes; a memory cell array including a plurality of memory cells arranged in word lines and bit lines, a high-voltage generator generating a program voltage pulse applied to a selected word line among the word lines, and a pass voltage applied to a non-selected word line, and control logic iteratively increasing the program voltage pulse and adjusting the pass voltage according to a defined increment during a program operation.

Abstract: Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.

Abstract: A non-volatile memory device includes a row decoder and a memory cell array. The row decoder generates a read voltage, and first, second and third drive voltages. The memory cell array includes a selected word line receiving the read voltage, a first neighboring word line of the selected word line receiving the second word line drive voltage, a second neighboring word line of the selected word line receiving the third word line drive voltage, and a non-neighboring word line of the selected word line receiving the first word line drive voltage.

Abstract: A floating gate type nonvolatile memory device comprises a semiconductor layer, wordlines crossing over the semiconductor layer, and a memory element disposed between the wordlines and facing the semiconductor layer.

Abstract: A non-volatile memory device includes a row decoder and a memory cell array. The row decoder generates a read voltage, and first, second and third drive voltages. The memory cell array includes a selected word line receiving the read voltage, a first neighboring word line of the selected word line receiving the second word line drive voltage, a second neighboring word line of the selected word line receiving the third word line drive voltage, and a non-neighboring word line of the selected word line receiving the first word line drive voltage.

Abstract: A programming method of a nonvolatile memory device is provided including: applying a local voltage to a first unselected word line; applying a local voltage to a second unselected word line, after the local voltage is applied to the first unselected word line; and applying a pass voltage to the first unselected word line, after the local voltage is applied to the second unselected word line. Related devices and systems are also provided herein.

Abstract: Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.

Abstract: A nonvolatile memory device includes; a memory cell array including a plurality of memory cells arranged in word lines and bit lines, a high-voltage generator generating a program voltage pulse applied to a selected word line among the word lines, and a pass voltage applied to a non-selected word line, and control logic iteratively increasing the program voltage pulse and adjusting the pass voltage according to a defined increment during a program operation.

Abstract: A flash memory device and a method of fabricating the same are provided. The flash memory device may include an isolation layer provided in a semiconductor substrate to define an active region. A floating gate may be provided on the active region. The floating gate may be spaced a first distance apart from the active region. A control gate may be provided, which covers a top surface of the floating gate and one of both sidewalls of the floating gate adjacent to the active region. The portion of the control gate covering one sidewall of the floating gate may be spaced a second distance, which may be greater than the first distance, apart from the active region.