Patents by Inventor Hyun-soo BAE

Hyun-soo BAE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180150242
    Abstract: Disclosed are a controller and a storage device for efficient buffer allocation, and a method of operating the storage device. The storage device includes a non-volatile memory including a plurality of non-volatile memory cells, a buffer including a plurality of storage spaces to be allocated for a plurality of commands fetched from a host, and a storage controller connected to the non-volatile memory via a plurality of channels, the storage controller being configured to store status information corresponding to a workload of each of the plurality of channels and to allocate the buffer for the plurality of commands, the allocation being based on the status information.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 31, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-ju YI, Hyun-soo BAE, Jung-pil LEE, Hyo-taek LEEM, Jong-min KIM, Ran-hee LEE
  • Patent number: 8797071
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 5, 2014
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jung-ho Lee, Hyun-soo Bae, Won-hi Oh, Jong-mu Lee
  • Publication number: 20140021985
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Application
    Filed: September 27, 2013
    Publication date: January 23, 2014
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Jung-ho LEE, Hyun-soo BAE, Won-hi OH, Jong-mu LEE
  • Patent number: 8547144
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: October 1, 2013
    Assignee: Fairchild Korea Semicondcutor Ltd.
    Inventors: Jung-ho Lee, Hyun-soo Bae, Won-hi Oh, Jong-mu Lee
  • Publication number: 20120176167
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Application
    Filed: December 13, 2011
    Publication date: July 12, 2012
    Inventors: Jung-ho LEE, Hyun-soo BAE, Won-hi OH, Jong-mu LEE