Patents by Inventor Hyun-soo Chae
Hyun-soo Chae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8067968Abstract: A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase difference distinction signal to distinguish a first phase difference range, and a second phase difference distinction signal to distinguish a second phase difference range wider than the first phase difference range, and a locking state setting unit configured to generate a locking state signal in response to the first phase difference distinction signal and the second phase difference distinction signal.Type: GrantFiled: September 24, 2010Date of Patent: November 29, 2011Assignee: Hynix Semiconductor Inc.Inventors: Dong-Suk Shin, Chul Woo Kim, Hyun Soo Chae
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Publication number: 20110012654Abstract: A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase difference distinction signal to distinguish a first phase difference range, and a second phase difference distinction signal to distinguish a second phase difference range wider than the first phase difference range, and a locking state setting unit configured to generate a locking state signal in response to the first phase difference distinction signal and the second phase difference distinction signal.Type: ApplicationFiled: September 24, 2010Publication date: January 20, 2011Applicants: HYNIX SEMICONDUCTOR INC., Korea University Industrial & Academic Collaboration FoundationInventors: Dong Suk Shin, Chul Woo Kim, Hyun Soo Chae
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Patent number: 7839190Abstract: A locking state detector includes a phase comparing unit configured to compare a reference clock signal and a feedback clock signal to generate a first phase difference distinction signal to distinguish a first phase difference range, and a second phase difference distinction signal to distinguish a second phase difference range wider than the first phase difference range, and a locking state setting unit configured to generate a locking state signal in response to the first phase difference distinction signal and the second phase difference distinction signal.Type: GrantFiled: October 31, 2008Date of Patent: November 23, 2010Assignees: Hynix Semiconductor Inc., Korea University Industrial & Academic Collaboration FoundationInventors: Dong-Suk Shin, Chul Woo Kim, Hyun Soo Chae
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Patent number: 7701300Abstract: A frequency synthesizing apparatus and method for a multi-band radio frequency (RF) receiver is provided. The frequency synthesizing apparatus includes a simple circuit configuration with a single SSB mixer and thus, may synthesize six high frequency signals. Signals to be inputted into the SSB mixer include a first signal and a second signal. The first signal is generated based on a VCO and a PPF. Also, the second signal is selected from a plurality of frequency divided signals which are generated by dividing a signal generated in the VCO via a plurality of dividers.Type: GrantFiled: July 7, 2006Date of Patent: April 20, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Eun Chul Park, Hyun Soo Chae, Hoon Tae Kim
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Patent number: 7668263Abstract: A frequency synthesizing apparatus and method for a multi-band radio frequency (RF) receiver is provided. The frequency synthesizing apparatus includes a simple circuit configuration with a single SSB mixer and thus, may synthesize six high frequency signals. Signals to be inputted into the SSB mixer include a first signal and a second signal. The first signal is generated based on a VCO and a PPF. Also, the second signal is selected from a plurality of frequency divided signals which are generated by dividing a signal generated in the VCO via a plurality of dividers.Type: GrantFiled: October 31, 2008Date of Patent: February 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Eun Chul Park, Hyun Soo Chae, Hoon Tae Kim
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Patent number: 7548124Abstract: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.Type: GrantFiled: October 26, 2006Date of Patent: June 16, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Soo Chae, Jung Eun Lee, Chun Deok Suh, Hoon Tae Kim
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Publication number: 20090061811Abstract: A frequency synthesizing apparatus and method for a multi-band radio frequency (RF) receiver is provided. The frequency synthesizing apparatus includes a simple circuit configuration with a single SSB mixer and thus, may synthesize six high frequency signals. Signals to be inputted into the SSB mixer include a first signal and a second signal. The first signal is generated based on a VCO and a PPF. Also, the second signal is selected from a plurality of frequency divided signals which are generated by dividing a signal generated in the VCO via a plurality of dividers.Type: ApplicationFiled: October 31, 2008Publication date: March 5, 2009Applicant: SAMSUNG ELECTRONCS CO., LTD.Inventors: Eun Chul Park, Hyun Soo Chae, Hoon Tae Kim
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Patent number: 7453317Abstract: An apparatus and method of reducing a flicker noise of a CMOS amplifier is provided. In the CMOS amplifier, a load circuit is connected to a signal input circuit which includes two pairs of MOSFETs which simultaneously receive differential signals. In this instance, a first MOSFET included in a switch-bias circuit is connected to one pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø1. A second MOSFET included in the switch-bias circuit is connected to another pair of MOSFETs which receive the differential signals and functions as a current source in the case of activation of a clock signal Ø2.Type: GrantFiled: December 27, 2006Date of Patent: November 18, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong Wook Koh, Hyun Soo Chae, Hoon Tae Kim
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Publication number: 20070249293Abstract: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.Type: ApplicationFiled: October 26, 2006Publication date: October 25, 2007Inventors: Hyun Soo Chae, Jung Eun Lee, Chun Deok Suh, Hoon Tae Kim
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Patent number: 6694105Abstract: A burst mode receiving apparatus having an offset compensating function and a data recovery method thereof, including an intermediate value detector to detect and output an intermediate value of an input signal input from an outside source in response to a switching control signal; an amplifier to amplify and output a difference between the input signal and a reference value; an offset compensator to generate a compensation signal having a level varied corresponding to the amplified result input from the amplifier and a compensation control signal; a summing portion to add the compensation signal and the intermediate value to output the added result as the reference value to the amplifier; and a controller to generate the switching control signal and the compensation control signal corresponding to a result obtained by analyzing the amplified result input from the amplifier and a reset signal input from the outside source.Type: GrantFiled: June 27, 2002Date of Patent: February 17, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Young-jun Chang, Hyun-soo Chae, Gun-hee Han, Hyun-surk Ryu
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Publication number: 20030012065Abstract: A burst mode receiving apparatus having an offset compensating function and a data recovery method thereof, including an intermediate value detector to detect and output an intermediate value of an input signal input from an outside source in response to a switching control signal; an amplifier to amplify and output a difference between the input signal and a reference value; an offset compensator to generate a compensation signal having a level varied corresponding to the amplified result input from the amplifier and a compensation control signal; a summing portion to add the compensation signal and the intermediate value to output the added result as the reference value to the amplifier; and a controller to generate the switching control signal and the compensation control signal corresponding to a result obtained by analyzing the amplified result input from the amplifier and a reset signal input from the outside source.Type: ApplicationFiled: June 27, 2002Publication date: January 16, 2003Applicant: Samsung Electronics Co., Ltd.Inventors: Young-joon Chang, Hyun-soo Chae, Gun-hee Han, Hyun-surk Ryu