Patents by Inventor Hyun-Su Lim

Hyun-Su Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8531617
    Abstract: A display includes; a substrate including a display region and a peripheral region, a common line portion provided in the peripheral region of the substrate, and the common line portion includes a common line and a common line protruding portion which extends away from and is wider than the common line, and a dummy pattern portion which partially overlaps a boundary region between the common line and the common line protruding portion.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: September 10, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong Hyuk Kim, Neung Ho Cho, Young Tae Noh, Jung Mok Park, Hyun Su Lim
  • Patent number: 8200299
    Abstract: Disclosed is a portable terminal that includes a main housing; a first sliding housing slidably installed on the main housing in such a manner that the first sliding housing slides in a first direction; second sliding housings slidably installed on the main housing in such a manner that the second sliding housings slide in a second direction; and a sliding module for providing driving force allowing the first and second sliding housings to move, the sliding module being installed on the main housing, wherein the first sliding housing and second sliding housings simultaneously move from each position where they overlap the main housing to each position where they extend from on the main housing.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: June 12, 2012
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Hyun-Su Lim
  • Publication number: 20120034957
    Abstract: Provided is a portable terminal including a battery opening extending in a longitudinal direction or a widthwise direction of the portable terminal on a rear surface of the portable terminal, a battery pack inserted into the battery opening in the longitudinal direction or the widthwise direction of the portable terminal, and an antenna module pivotably coupled to the rear surface of the portable terminal to open or close the battery opening. The built-in antenna module can pivot, such that the battery pack can be inserted or ejected in the longitudinal direction or the widthwise direction of the portable terminal.
    Type: Application
    Filed: March 17, 2011
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Hun KIM, Hyun-Su LIM, Jea-Moon JUNG, Geun-A LEE
  • Patent number: 7800118
    Abstract: An array substrate includes a transparent substrate, a switching element, an insulating layer and a pixel electrode. The switching element includes a gate electrode formed on the transparent substrate and connected to a gate line, a channel layer formed on the gate electrode and extended in a first direction, a source electrode formed on the transparent substrate and connected to a source line and a drain electrode formed on the channel layer to cover the channel layer. The insulating layer has a contact hole to partially expose the drain electrode and the transparent substrate. The pixel electrode is connected to the drain electrode through the contact hole. When the above array substrate is employed in a liquid crystal display panel, the array substrate reduces pixel defect.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: September 21, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Seong Byun, In Sung Lee, Hoon-Kee Min, Hyun-su Lim
  • Publication number: 20090312076
    Abstract: Disclosed is a portable terminal that includes a main housing; a first sliding housing slidably installed on the main housing in such a manner that the first sliding housing slides in a first direction; second sliding housings slidably installed on the main housing in such a manner that the second sliding housings slide in a second direction; and a sliding module for providing driving force allowing the first and second sliding housings to move, the sliding module being installed on the main housing, wherein the first sliding housing and second sliding housings simultaneously move from each position where they overlap the main housing to each position where they extend from on the main housing.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 17, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hyun-Su LIM
  • Publication number: 20090298562
    Abstract: A portable communication apparatus is provided. The portable terminal includes a first housing, a second housing rotatably assembled with the first housing in a state where the second housing faces the first housing, and third and fourth housings disposed within the first housing, the third and fourth housings sliding the second housing and being inserted into/drawn from both sides of the first housing according to the sliding.
    Type: Application
    Filed: June 2, 2009
    Publication date: December 3, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hyun-Su LIM
  • Patent number: 7539128
    Abstract: Disclosed herein is a method for protecting and restoring a link in an OBS network. The method includes a step of transmitting/receiving a liveness-confirming message for confirming liveness of the link between an up-node and a down-node respectively connected to both ends of the link at a predetermined message transmission period, to judge whether a fault is generated on the link, a step in which the up-node and down-node respectively update link information when it is judged that the link fault is not generated, and a step of restoring the link having the fault using predetermined restoration channel information based on an offered load measured when the link is in a normal state when it is judged that the link fault is generated. Accordingly, a link having a problem can be effectively protected and restored in the OBS network.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: May 26, 2009
    Assignees: Samsung Electronics Co., Ltd., Information and Communications University Research and Industrial Cooperation Group
    Inventors: Hyun Su Lim, In Yong Hwang, Hong Shik Park
  • Patent number: 7473573
    Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: January 6, 2009
    Assignee: Samsung Electronics., Co., Ltd.
    Inventors: Jae-Seong Byun, Kun-Jong Lee, Hyun-Su Lim, Jong-Hwan Cha, Bae-Hyoun Jung
  • Publication number: 20080108187
    Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.
    Type: Application
    Filed: December 26, 2007
    Publication date: May 8, 2008
    Inventors: Jae-Seong BYUN, Kun-Jong LEE, Hyun-Su LIM, Jong-Hwan CHA, Bae-Hyoun JUNG
  • Publication number: 20080106661
    Abstract: A display includes; a substrate including a display region and a peripheral region, a common line portion provided in the peripheral region of the substrate, and the common line portion includes a common line and a common line protruding portion which extends away from and is wider than the common line, and a dummy pattern portion which partially overlaps a boundary region between the common line and the common line protruding portion.
    Type: Application
    Filed: October 31, 2007
    Publication date: May 8, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong Hyuk KIM, Neung Ho CHO, Young Tae NOH, Jung Mok PARK, Hyun Su LIM
  • Publication number: 20080093599
    Abstract: An array substrate includes a transparent substrate, a switching element, an insulating layer and a pixel electrode. The switching element includes a gate electrode formed on the transparent substrate and connected to a gate line, a channel layer formed on the gate electrode and extended in a first direction, a source electrode formed on the transparent substrate and connected to a source line and a drain electrode formed on the channel layer to cover the channel layer. The insulating layer has a contact hole to partially expose the drain electrode and the transparent substrate. The pixel electrode is connected to the drain electrode through the contact hole. When the above array substrate is employed in a liquid crystal display panel, the array substrate reduces pixel defect.
    Type: Application
    Filed: December 14, 2007
    Publication date: April 24, 2008
    Inventors: Jae-Seong BYUN, In-Sung LEE, Hoon-Kee MIN, Hyun-Su LIM
  • Patent number: 7319240
    Abstract: An array substrate includes a transparent substrate, a switching element, an insulating layer and a pixel electrode. The switching element includes a gate electrode formed on the transparent substrate and connected to a gate line, a channel layer formed on the gate electrode and extended in a first direction, a source electrode formed on the transparent substrate and connected to a source line and a drain electrode formed on the channel layer to cover the channel layer. The insulating layer has a contact hole to partially expose the drain electrode and the transparent substrate. The pixel electrode is connected to the drain electrode through the contact hole. When the above array substrate is employed in a liquid crystal display panel, the array substrate reduces pixel defect.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: January 15, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Seong Byun, In-Sung Lee, Hoon-Kee Min, Hyun-Su Lim
  • Patent number: 7312470
    Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer. The data wire includes a data line, a source electrode connected to the data line, a drain electrode facing the source electrode and a data pad connected to one end of the data line. A passivation layer is formed on the gate insulating layer while exposing the data pad and a portion of the data line close to the data pad.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: December 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Seong Byun, Kun-Jong Lee, Hyun-Su Lim, Jong-Hwan Cha, Bae-Hyoun Jung
  • Publication number: 20070090403
    Abstract: An array substrate includes a substrate, an electrode pad, an insulating layer and a transparent electrode. The substrate includes a display region and a peripheral region adjacent to the display region. The electrode pad is in the peripheral region. The electrode pad includes a first metal layer and a second metal layer. The second metal layer is on the first metal layer, and includes an opening through which the first metal layer is partially exposed. The insulating layer is on the electrode pad and covers a side surface of the second metal layer in the opening and a portion of the exposed the first metal layer. The transparent electrode is on the insulating layer, and is electrically connected to the first metal layer through a via hole in the insulating layer.
    Type: Application
    Filed: October 4, 2006
    Publication date: April 26, 2007
    Inventors: Hyun-Jae Ahn, Hyun-Su Lim, In-Sung Lee, Ki-Wan Ahn, Jae-Seong Byun
  • Publication number: 20060049413
    Abstract: An array substrate includes a transparent substrate, a switching element, an insulating layer and a pixel electrode. The switching element includes a gate electrode formed on the transparent substrate and connected to a gate line, a channel layer formed on the gate electrode and extended in a first direction, a source electrode formed on the transparent substrate and connected to a source line and a drain electrode formed on the channel layer to cover the channel layer. The insulating layer has a contact hole to partially expose the drain electrode and the transparent substrate. The pixel electrode is connected to the drain electrode through the contact hole. When the above array substrate is employed in a liquid crystal display panel, the array substrate reduces pixel defect.
    Type: Application
    Filed: September 6, 2005
    Publication date: March 9, 2006
    Inventors: Jae-Seong Byun, In-Sung Lee, Hoon-Kee Min, Hyun-Su Lim
  • Publication number: 20050012150
    Abstract: The present invention relates to a TFT array panel and a fabricating method thereof. A gate insulating layer and a passivation layer are formed by printing organic insulating material in order to simplify the fabricating process. The inventive TFT panel includes an insulating substrate, and a gate wire formed on the insulating substrate. The gate wire includes a gate line extending in a first direction and a gate pad connected to one end of the gate line. A gate insulating layer is formed on the insulating substrate while exposing the gate pad and a portion of the gate line close to the gate pad. A semiconductor pattern is formed on the gate insulating layer. A data wire is formed on the gate insulating layer.
    Type: Application
    Filed: June 20, 2002
    Publication date: January 20, 2005
    Inventors: Jae-Seong Byun, Kun-Jong Lee, Hyun-Su Lim, Jong-Hwan Cha, Bae-Hyoun Jung