Patents by Inventor Hyun-Suk Kwon
Hyun-Suk Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120584Abstract: A secondary battery includes: a can having an accommodation space therein; an electrode assembly accommodated in the accommodation space in the can; and a cap assembly sealed with the can. The can has a beading part recessed into a side wall of the can at a region below where the cap assembly is accommodated, and the beading part has an acute angle with respect to the side wall of the can.Type: ApplicationFiled: October 11, 2023Publication date: April 11, 2024Inventors: Jun Ho YANG, Woo Hyuk CHOI, Tae Yoon LEE, Jun Hwan KWON, Joung Ku KIM, Hyun Suk PARK, Dong Sub LEE
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Patent number: 8962438Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.Type: GrantFiled: September 20, 2013Date of Patent: February 24, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Jeonghee Park, Hideki Horii, Hyeyoung Park, Jin Ho Oh, Hyun-Suk Kwon
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Patent number: 8871559Abstract: Provided is a method for fabricating a phase change memory device. The method includes forming a plurality of bottom electrodes on a substrate, forming a first mold layer on the substrate to extend in a first direction where the bottom electrodes are exposed, forming a second mold layer on the substrate, the second mold layer extending in a second direction orthogonal to the first direction to expose parts of the bottom electrodes, forming a phase change material layer on the first and second mold layers to be connected to parts of the bottom electrodes dividing the phase change material layer as a plurality of phase change layers respectively connected to the parts of the bottom electrodes and forming a plurality of top electrodes on the phase change layers.Type: GrantFiled: June 7, 2011Date of Patent: October 28, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hideki Horii, Hyun-Suk Kwon, Hyeyoung Park
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Publication number: 20140024195Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.Type: ApplicationFiled: September 20, 2013Publication date: January 23, 2014Applicant: SAMSUNG ELECTRONICS CO., LTDInventors: JEONGHEE PARK, HIDEKI HORII, HYEYOUNG PARK, JIN HO OH, HYUN-SUK KWON
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Patent number: 8634236Abstract: Provided are a phase change memory device and a fabricating method thereof. The phase change memory device includes a substrate, an interlayer dielectric layer formed on the substrate, first and second contact holes formed in the interlayer dielectric layer, and a memory cell formed in the first and second contact holes and including a diode, a first electrode on the diode, a phase change material layer on the first electrode, and a second electrode on the phase change material layer, wherein the first contact hole and the second contact hole are spaced apart from and separated from each other.Type: GrantFiled: September 16, 2011Date of Patent: January 21, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hye-Young Park, Jeong-Hee Park, Hyun-Suk Kwon
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Patent number: 8552412Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.Type: GrantFiled: December 20, 2010Date of Patent: October 8, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jeonghee Park, Hideki Horii, Hyeyoung Park, Jin Ho Oh, Hyun-Suk Kwon
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Patent number: 8225049Abstract: Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to the semiconductor chip. The rechargeable micro-battery includes a first current collector and a second current collector, which face each other, a first polarizing electrode in contact with the first current collector and facing the second current collector, a second polarizing electrode in contact with the second current collector and facing the first polarizing electrode, and an electrolyte layer formed between the first and second polarizing electrodes.Type: GrantFiled: January 19, 2010Date of Patent: July 17, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Subramanya Mayya, Hee-seok Kim, Ik-Soo Kim, Min-Young Park, Hyun-Suk Kwon
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Publication number: 20120068136Abstract: Provided are a phase change memory device and a fabricating method thereof. The phase change memory device includes a substrate, an interlayer dielectric layer formed on the substrate, first and second contact holes formed in the interlayer dielectric layer, and a memory cell formed in the first and second contact holes and including a diode, a first electrode on the diode, a phase change material layer on the first electrode, and a second electrode on the phase change material layer, wherein the first contact hole and the second contact hole are spaced apart from and separated from each other.Type: ApplicationFiled: September 16, 2011Publication date: March 22, 2012Inventors: Hye-Young Park, Jeong-Hee Park, Hyun-Suk Kwon
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Patent number: 8133757Abstract: A phase changeable memory unit includes a lower electrode, an insulating interlayer structure having an opening, a phase changeable material layer and an upper electrode. The lower electrode is formed on a substrate. The insulating interlayer structure has an opening and is formed on the lower electrode and the substrate. The opening exposes the lower electrode and has a width gradually decreasing downward. The phase changeable material layer fills the opening and partially covers an upper face of the insulating interlayer structure. The upper electrode is formed on the phase changeable material layer.Type: GrantFiled: December 3, 2009Date of Patent: March 13, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Suk Kwon, Young-Soo Lim, Sung-Un Kwon, Yong-Ho Ha, Jeong-Hee Park, Joon-Sang Park, Myung-Jin Kang, Doo-Hwan Park
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Publication number: 20110300685Abstract: Provided is a method for fabricating a phase change memory device. The method includes forming a plurality of bottom electrodes on a substrate, forming a first mold layer on the substrate to extend in a first direction where the bottom electrodes are exposed, forming a second mold layer on the substrate, the second mold layer extending in a second direction orthogonal to the first direction to expose parts of the bottom electrodes, forming a phase change material layer on the first and second mold layers to be connected to parts of the bottom electrodes dividing the phase change material layer as a plurality of phase change layers respectively connected to the parts of the bottom electrodes and forming a plurality of top electrodes on the phase change layers.Type: ApplicationFiled: June 7, 2011Publication date: December 8, 2011Inventors: HIDEKI HORII, Hyun-Suk Kwon, Hyeyoung Park
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Patent number: 8039829Abstract: A contact structure that includes a first pattern formed on a substrate, wherein the first pattern has a recessed region in an upper surface thereof, a planarized buffer pattern formed on the first pattern, and a conductive pattern formed on the planarized buffer pattern.Type: GrantFiled: March 27, 2009Date of Patent: October 18, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-Hee Park, Yong-Ho Ha, Hyeong-Geun An, Joon-Sang Park, Hyun-Suk Kwon, Myung-Jin Kang, Doo-Hwan Park
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Publication number: 20110186798Abstract: Phase changeable memory devices are provided including a mold insulating layer on a substrate, the mold insulating layer defining an opening therein. A phase-change material layer is provided in the opening. The phase-change material includes an upper surface that is below a surface of the mold insulating layer. A first electrode is provided in the opening and on the phase-change material layer. A spacer is provided between a sidewall of the mold insulating layer and the phase-change material layer and the first electrode. The upper surface of the first electrode is coplanar with the surface of the mold insulating layer. Related methods are also provided.Type: ApplicationFiled: February 2, 2011Publication date: August 4, 2011Inventors: Hyun-Suk Kwon, Hyeyoung Park, Jeonghee Park, Gyuhwan Oh, Jinho Oh, Doo-Hwan Park
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Publication number: 20110147692Abstract: Provided are a variable resistance memory device and a method of forming the same. The variable resistance memory device may include a substrate, a plurality of bottom electrodes on the substrate, and a first interlayer insulating layer including a trench formed therein. The trench exposes the bottom electrodes and extends in a first direction. The variable resistance memory device further includes a top electrode provided on the first interlayer insulating layer and extending in a second direction crossing the first direction and a plurality of variable resistance patterns provided in the trench and having sidewalls aligned with a sidewall of the top electrode.Type: ApplicationFiled: December 20, 2010Publication date: June 23, 2011Inventors: JEONGHEE PARK, Hideki Horii, Hyeyoung Park, Jin Ho Oh, Hyun-Suk Kwon
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Publication number: 20100230281Abstract: Provided are a thin film forming apparatus and a thin film forming method. The thin film forming apparatus comprises a first electrode provided for etching a thin film formed on the substrate, a second electrode provided for forming a plasma in the internal space, a third electrode provided for focusing the plasma, and a control unit controlling a voltage to be applied to the first through third electrodes.Type: ApplicationFiled: March 12, 2010Publication date: September 16, 2010Inventors: Jeonghee Park, Yongho Ha, Hyeyoung Park, Hyun-Suk Kwon
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Publication number: 20100181605Abstract: Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to the semiconductor chip. The rechargeable micro-battery includes a first current collector and a second current collector, which face each other, a first polarizing electrode in contact with the first current collector and facing the second current collector, a second polarizing electrode in contact with the second current collector and facing the first polarizing electrode, and an electrolyte layer formed between the first and second polarizing electrodes.Type: ApplicationFiled: January 19, 2010Publication date: July 22, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Subramanya MAYYA, Hee-seok KIM, Ik-Soo KIM, Min-Young PARK, Hyun-Suk KWON
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Publication number: 20100176365Abstract: A resistance variable memory device includes at least one bottom electrode, a first insulating layer containing a trench which exposes the at least one bottom electrode, and a resistance variable material layer including respective first and second portions located on opposite sidewalls of the trench, respectively, where the first and second portions of the resistance variable material layer are electrically connected to the at least one bottom electrode.Type: ApplicationFiled: January 8, 2010Publication date: July 15, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyeyoung Park, Hyun Suk Kwon, Jin Ho Oh, Yong Ho Ha, Jeong Hee Park
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Publication number: 20100144135Abstract: A phase changeable memory unit includes a lower electrode, an insulating interlayer structure having an opening, a phase changeable material layer and an upper electrode. The lower electrode is formed on a substrate. The insulating interlayer structure has an opening and is formed on the lower electrode and the substrate. The opening exposes the lower electrode and has a width gradually decreasing downward. The phase changeable material layer fills the opening and partially covers an upper face of the insulating interlayer structure. The upper electrode is formed on the phase changeable material layer.Type: ApplicationFiled: December 3, 2009Publication date: June 10, 2010Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun-Suk Kwon, Young-Soo Lim, Sung-Un Kwon, Yong-Ho Ha, Jeong-Hee Park, Joon-Sang Park, Myung-Jin Kang, Doo-Hwan Park
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Publication number: 20100124800Abstract: A method of fabricating a variable resistance memory device includes a plasma etching process to remove contaminants from variable resistance material that forms variable resistance elements of the device. Bottom electrodes are formed on a semiconductor substrate. Next, an interlayer dielectric layer having trenches that expose the bottom electrodes is formed on the substrate. Then a layer of variable resistance material is formed. The variable resistance material covers the interlayer dielectric layer and fills the trenches. The variable resistance material is then planarized down to at least the top surface of the interlayer dielectric layer, thereby leaving elements of the variable resistance material in the trenches. The variable resistance material in the trenches is etched to remove contaminants, produced as a result of the planarizing process, from atop the variable resistance material in the trenches. A top electrode is then formed on the variable resistance material.Type: ApplicationFiled: November 13, 2009Publication date: May 20, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jeonghee Park, Sunglae Cho, Yongho Ha, Hyun-Suk Kwon
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Publication number: 20100051896Abstract: A variable resistance memory device includes a substrate and a plurality of spaced apart lower electrodes on the substrate. The device further includes a variable resistance material pattern comprising two vertically opposed wall members connected by a bottom member disposed on and electrically connected to at least one of the plurality of lower electrodes and an upper electrode on the variable resistance material pattern. An area of contact of the variable resistance material pattern with the at least one lower electrode may be rectangular, circular, ring-shaped, or arc-shaped. Fabrication methods are also described.Type: ApplicationFiled: August 28, 2009Publication date: March 4, 2010Inventors: Jeonghee Park, Yongho Ha, Dohyung Kim, Joonsang Park, Hyeyoung Park, Hyun-Suk Kwon
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Publication number: 20090250682Abstract: Provided is a phase change memory device. The phase change memory device includes a first electrode and a second electrode. A phase change material pattern is interposed between the first and second electrodes. A phase change auxiliary pattern is in contact with at least one side of the phase change material pattern. The phase change auxiliary pattern includes a compound having a chemical formula expressed as DaMb[GxTy]c(0?a/(a+b+c)?0.2, 0?b/(a+b+c)?0.1, 0.3?x/(x+y)?0.7), where D comprises: at least one of C, N, and O; M comprises at least one of a transition metal, Al, Ga, and In; G comprises Ge; and T comprises Te.Type: ApplicationFiled: March 18, 2009Publication date: October 8, 2009Inventors: Doo-Hwan Park, Yong-Ho Ha, Myung-Jin Kang, Jeong-Hee Park, Hyun-Suk Kwon