Patents by Inventor Hyun Sung

Hyun Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11770933
    Abstract: A memory device includes a substrate defined with a first cell region and a second cell region, and a row decoder region between the first and second cell regions; a peripheral circuit defined in the first and second cell regions of the substrate; pass transistors defined in the row decoder region of the substrate; bottom wiring layers disposed in a first dielectric layer covering the peripheral circuit and the pass transistors; a memory cell array defined on the first dielectric layer; a second dielectric layer defined on the first dielectric layer, and covering the memory cell array; top wiring layers disposed in a third dielectric layer defined on the second dielectric layer; and global lines disposed in the row decoder region, and configured to transfer operating voltages to the pass transistors, wherein the global lines are disposed only in at least one bottom wiring layer from among the bottom and top wiring layers.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Jin Ho Kim, Young Ki Kim, Sang Hyun Sung, Sung Lae Oh, Byung Hyun Jeon
  • Publication number: 20230298227
    Abstract: An information display apparatus may include a processor configured to display a display object in augmented reality; and a storage configured to store data and algorithms driven by the processor, wherein the processor determines a position of the display object by use of at least one of a total number of lanes or a number of lanes in a road in a driving direction of a host vehicle, possible traveling direction information for each lane, and driving direction information related to the host vehicle, and the information display apparatus is disposed within a vehicle or outside the vehicle, and when disposed outside the vehicle, is configured to transmit display information related to the display object to the vehicle or a mobile device.
    Type: Application
    Filed: May 25, 2023
    Publication date: September 21, 2023
    Applicants: HYUNDAI MOTOR COMPANY, Kia Corporation, HYUNDAI AUTOEVER Corp.
    Inventors: Tae Hyun SUNG, Bum Hee CHUNG, Joo Young LEE, Young Jun YOU, Jeong Hyeok SEO, Soo In KO, Sung Eun LIM
  • Publication number: 20230286956
    Abstract: The present invention relates to 1-alkyl-5-arylidene-2-selenoxoimidazolidine-4-ons and derivatives thereof, a method for producing the same, and a composition for prevention, improvement or treatment of neurodegenerative disease containing the same. Specifically, 1-alkyl-5-arylidene-2-selenoxoimidazolidine-4-ons and derivatives thereof, which are novel compounds of the present invention, can be used as an excellent composition for prevention, improvement or treatment of neurodegenerative disease.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 14, 2023
    Inventors: Sang Hyup LEE, Dong Young CHOI, Jungkwan LEE, Sung Hoon AHN, Sun CHOI, Hyun Sung CHO, Cho Rong KIM, Yoo Jin LIM, Ye Eun KIM, Yoonji LEE
  • Publication number: 20230282640
    Abstract: A semiconductor device comprising a first active pattern including a first lower pattern, and a plurality of first sheet patterns, a plurality of first gate structures on the first lower pattern, a second active pattern including a second lower pattern and a plurality of second sheet patterns, a plurality of second gate structures on the second lower pattern, a first source/drain recess between adjacent first gate structures, a second source/drain recess between adjacent second gate structures, first and second source/drain patterns in the first and second source/drain recesses, respectively, wherein a depth from an upper surface of the first lower pattern to a lowermost part of the first source/drain pattern is smaller than a depth from an upper surface of the second lower pattern to a lowermost part of the second source/drain pattern, and the first and second source/drain patterns include impurities of same conductive type.
    Type: Application
    Filed: December 12, 2022
    Publication date: September 7, 2023
    Inventors: Jung Gun YOU, Sug Hyun SUNG, Dong Woo HAN
  • Publication number: 20230284475
    Abstract: A display device comprises a substrate, a pixel electrode, a common electrode, an intermediate layer, a semiconductor layer, a metal layer, and an organic layer. The substrate includes an opening area, a peripheral area surrounding the opening area, and a display area surrounding the peripheral area. The pixel electrode overlaps the display area. The common electrode overlaps the pixel electrode. The intermediate layer is disposed between the pixel electrode and the common electrode and includes a light emitting layer and a functional layer. The semiconductor layer overlaps the peripheral area and is spaced from the display area. The metal layer overlaps the semiconductor layer. The organic layer is disposed between the semiconductor layer and the metal layer. The common electrode, the functional layer, and the metal layer respectively have a first opening, a second opening, a third opening overlapping each other and overlapping the semiconductor layer.
    Type: Application
    Filed: October 12, 2022
    Publication date: September 7, 2023
    Inventors: Eon Seok OH, Jung Joon SEO, Tae Hyun SUNG, Seung Soo HONG, Je-Hyun SONG
  • Publication number: 20230282603
    Abstract: A three-dimensional semiconductor device includes a peripheral circuit device layer that includes a page buffer area, a pass transistor area adjacent to the page buffer layer, and a logic transistor area adjacent to the pass transistor area in the first direction, and a memory cell device layer that includes a cell area and a staircase area extending from the cell area. The peripheral circuit device layer includes transistors, peripheral circuit via plugs, and peripheral circuit interconnection layers on a substrate. The memory cell device layer includes word line stack including interlayer insulating layers and word lines alternately stacked, the word line stack including end portions stacked in a staircase in the staircase area; a bit line array including bit lines arranged in the cell area; and word line pillars electrically connected to the end portions of the word lines in the staircase area, respectively.
    Type: Application
    Filed: June 30, 2022
    Publication date: September 7, 2023
    Inventors: Sung Lae OH, Sang Hyun SUNG, Hyun Soo SHIN, Kang Sik CHOI
  • Patent number: 11746955
    Abstract: A support system for a connection unit for connecting an inner tank and an outer tank of a cryogenic fluid storage tank includes: an inner support formed to surround a part of the connection unit; a head coupled to the inner circumferential surface of a first end portion of the inner support, and formed to comes in contact with an end portion of the connection unit when the connection unit is coupled to the inner support; and an outer support formed to surround the inner support and having a first end portion connected to a second end portion of the inner support, wherein a second end portion of the outer support comes in contact with the inner tank or the outer tank.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: September 5, 2023
    Assignees: HYLIUM INDUSTRIES, INC., KOREA INSTITUTE OF OCEAN SCIENCE TECHNOLOGY
    Inventors: Do Hyung Kim, Stepien Piotr, Soo Yong Song, Dong Yeong Jeong, Dong Hee Hong, Seo Young Kim, Hyun Suk Kim, Hyun Sung Kim, Byoung Jae Park
  • Patent number: 11742288
    Abstract: A three-dimensional memory device includes a plurality of electrode stacks stacked on a substrate in a vertical direction, each of the plurality of electrode stacks including a plurality of interlayer dielectric layers alternately stacked in the vertical direction with a plurality of electrode layers; and a plurality of staircase structures defined in the plurality of electrode stacks, each of the plurality of staircase structures configured by pad regions of electrode layers in an electrode stack that are disposed in a staircase shape, a staircase structure of an electrode stack lower in the plurality of electrode stacks has a larger width than a staircase structure of an electrode stack that is higher in the plurality of electrode stacks.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: August 29, 2023
    Assignee: SK hynix Inc.
    Inventors: Sang Hyun Sung, Sung Lae Oh
  • Publication number: 20230256495
    Abstract: Provided are a method and apparatus for manufacturing hot press formed parts for a multi-step process, the method comprising: a heating step for heating a strip material; a transferring step for transferring the heated strip material to a processing apparatus having mounted on a press a plurality of molds comprising a notching mold and/or a blanking mold, a forming mold, and a trimming mold; a notching step, for obtaining a notched material connected to the strip by means of a web portion by cutting a part of the material by means of the notching mold, and/or a blanking step for obtaining a blanked material separated from the strip by cutting a part of the material by means of the blanking mold; a forming step of transferring and positioning the material which has gone through the notching step and/or the blanking step near the forming mold, and then forming the material by means of the forming mold; and a trimming step for removing, by means of the trimming mold, an outer edge portion of the material which i
    Type: Application
    Filed: June 28, 2021
    Publication date: August 17, 2023
    Applicant: POSCO Co., Ltd
    Inventors: Hong-Gee Kim, Hyun-Sung Son
  • Patent number: 11718188
    Abstract: A wireless battery management system includes a plurality of slave BMSs coupled to a plurality of battery modules in one-to-one correspondence. Each slave BMS is configured to operate in active mode and sleep mode. Each slave BMS is configured to wirelessly transmit a detection signal indicating a state of the battery module. The wireless battery management system further includes a master BMS configured to wirelessly receive the detection signal from each of the plurality of slave BMSs. The master BMS is configured to set a scan cycle and a scan duration for each of the plurality of slave BMSs based on the detection signal, and wirelessly transmit a control signal to the plurality of slave BMSs. The control signal includes a wireless balancing command indicating the scan cycle and the scan duration set for each of the plurality of slave BMSs.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: August 8, 2023
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Ji-Eun Kim, Chang-Hyun Sung, Sang-Hoon Lee, Yean-Sik Choi
  • Patent number: 11712674
    Abstract: A graphene manufacturing device using Joule heating includes: a chamber having a space provided therein so as to synthesize graphene; and a first roller portion and a second roller portion disposed inside the chamber to be spaced from each other such that same support a catalyst metal penetrating the interior of the chamber and are supplied with an electric current for graphene synthesis, thereby Joule-heating the catalyst metal. In order to compensate for a temperature deviation of the catalyst metal passing between the first roller portion and the second roller portion, a first area of the catalyst metal, which is close to the first roller portion, and a second area of the catalyst metal, which is close to the second roller portion, are disposed to have movement paths facing each other.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: August 1, 2023
    Assignees: CENTER FOR ADVANCED META-MATERIALS, KOREA INSTITUTE OF MACHINERY-MATERIALS
    Inventors: Hyun June Jung, Jae Hyun Kim, Se Jeong Won, Jong Jin Park, Jun Hyuk Kwak, Hak Joo Lee, Bong Kyun Jang, Hyun Sung Park, Kyung Sik Kim
  • Publication number: 20230240069
    Abstract: A memory device may include an electrode structure including a plurality of electrode layers and a plurality of interlayer dielectric layers that are alternately stacked on a substrate; a trench in the electrode structure, and having an upper sidewall, a lower sidewall and a horizontal portion that couples the upper sidewall to the lower sidewall and that is parallel to a top surface of the substrate; a dielectric layer in the trench; and a slimming hole in the electrode structure having a sidewall of the trench and a region of the dielectric layer, and having a bottom surface disposed on an electrode layer on which the horizontal portion of the trench is positioned.
    Type: Application
    Filed: January 22, 2023
    Publication date: July 27, 2023
    Inventors: Sung Lae OH, Sang Hyun SUNG, Hyun Soo SHIN
  • Publication number: 20230238322
    Abstract: A three-dimensional memory device includes a first electrode structure and a second electrode structure extending in a first direction, being adjacent to each other in a second direction intersecting with the first direction, and each including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a source plate; a plurality of first slimming holes formed in the first electrode structure to expose pad regions of the electrode layers of the first electrode structure, and arranged in the first direction; and a plurality of second slimming holes formed in the second electrode structure to expose pad regions of the electrode layers of the second electrode structure, and arranged in the first direction, wherein a first slimming hole and a second slimming hole which are adjacent in the second direction have different depths.
    Type: Application
    Filed: June 17, 2022
    Publication date: July 27, 2023
    Inventors: Jin Ho KIM, Chang Woo KANG, Sang Hyun SUNG, Chang Man SON, Sung Lae OH
  • Publication number: 20230227027
    Abstract: A vehicle includes a front camera, a front radar, a corner radar, a corner LiDAR, and a controller configured to generate a first fusion mode by processing image data and radar data or to generate a second fusion mode by processing radar data and LiDAR data, wherein the controller changes the first fusion mode to the second fusion mode when the controller detects an abnormality of the front camera while performing avoidance control of the vehicle based on the first fusion mode, and performs the avoidance control based on the second fusion mode for a predetermined time period.
    Type: Application
    Filed: December 8, 2022
    Publication date: July 20, 2023
    Applicants: Hyundai Motor Company, KIA CORPORATION
    Inventors: Dong Hyun SUNG, Dae Seok JEON, Yongseok KWON, Tae-Geun AN, Hyoungjong WI, Joon Ho LEE, Eungseo KIM, Sangmin LEE
  • Publication number: 20230219565
    Abstract: A vehicle includes a camera obtaining image data for detecting a target in the external field of view, a radar obtaining radar data for detecting the target, and a controller configured to process the image data and the radar data, and controlling at least one of braking and steering devices based on a result of the processing, wherein the controller is configured to detect a target in a lane adjacent to the vehicle, and obtain a first index based on a lateral velocity of the target, a second index based on a heading angle of the target, and a third index based on a possibility of collision of the vehicle with the target, and when each of the first to third indexes corresponds to a predetermined output value, detect a cut-in attempt of the target, and control at least one of the braking and steering devices for adjusting an avoidance control timing for the target.
    Type: Application
    Filed: December 9, 2022
    Publication date: July 13, 2023
    Applicants: Hyundai Motor Company, Kia Corporation
    Inventors: Tae-Geun AN, Dae Seok JEON, Dong Hyun SUNG, Sangmin LEE, Hyoungjong WI, Joon Ho LEE, Eungseo KIM, Yongseok KWON
  • Patent number: 11699251
    Abstract: An information display apparatus may include a processor configured to display a display object in augmented reality; and a storage configured to store data and algorithms driven by the processor, wherein the processor determines a position of the display object by use of at least one of a total number of lanes or a number of lanes in a road in a driving direction of a host vehicle, possible traveling direction information for each lane, and driving direction information related to the host vehicle, and the information display apparatus is disposed within a vehicle or outside the vehicle, and when disposed outside the vehicle, is configured to transmit display information related to the display object to the vehicle or a mobile device.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: July 11, 2023
    Assignees: HYUNDAI MOTOR COMPANY, Kia Corporation, HYUNDAI AUTOEVER Corp.
    Inventors: Tae Hyun Sung, Bum Hee Chung, Joo Young Lee, Young Jun You, Jeong Hyeok Seo, Soo In Ko, Sung Eun Lim
  • Patent number: 11695164
    Abstract: A battery pack management device capable of reducing power consumption while transmitting and receiving data between a master BMS and a slave BMS by using a wireless communication method. The battery pack management device according to the present disclosure includes: a master BMS including an external communicator, an internal communicator, and a master controller and a slave BMS including a power supply, a state measurement sensor, a slave wireless communicator, and a slave controller.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: July 4, 2023
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Chang-Hyun Sung, Jae-Dong Park, Sang-Hoon Lee, Yean-Sik Choi
  • Publication number: 20230207013
    Abstract: A memory device includes a memory cell array included in a first semiconductor layer, and including a plurality of row lines that extend in a first direction, each of the plurality of row lines having a pad part disposed in a slimming region; a row decoder included in a second semiconductor layer disposed under the first semiconductor layer, and overlapping the memory cell array in a vertical direction; slimming regions disposed on both sides of the row decoder in the first direction; and a plurality of wiring lines coupling the pad parts of the plurality of row lines and the row decoder.
    Type: Application
    Filed: April 20, 2022
    Publication date: June 29, 2023
    Inventors: Sang Hyun SUNG, Sung Lae OH
  • Publication number: 20230206562
    Abstract: An image processing method is provided. The method includes generating appearance information corresponding to a canonical space defined by a cube including a plurality of regular grids in a first input image by implementing a first neural network, generating geometric information corresponding to a standard space in a second input image by implementing a second neural network, deforming the plurality of regular grids based on the generated geometric information, generating standardized image information by applying the appearance information to the plurality of deformed regular grids, and generating an output image based on the standardized image information.
    Type: Application
    Filed: June 6, 2022
    Publication date: June 29, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: MINJUNG SON, HYUN SUNG CHANG, INWOO HA
  • Publication number: 20230207627
    Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device comprising an active pattern including, a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction perpendicular to the first direction, wherein the lower pattern includes a semiconductor material, a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction, wherein each of the plurality of gate structures includes a gate electrode and a gate insulating film, a source/drain recess between adjacent ones of the gate structures, wherein a bottom of the source/drain recess is in the lower pattern, a bottom insulating liner in the bottom of the source/drain recess, and a source/drain pattern in the source/drain recess and on top of the bottom insulating liner.
    Type: Application
    Filed: October 6, 2022
    Publication date: June 29, 2023
    Inventors: Sug Hyun Sung, Jung Gun You, Mi Ri Joung