Patents by Inventor Hyun-Won Mun

Hyun-Won Mun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8422981
    Abstract: An integrated circuit (IC) includes multiple circuits isolated with respect to one another. Each circuit of the multiple circuits includes an inductor pair formed in a loop pattern on a same layer as at least one other inductor pair from another circuit of the multiple circuits, such that the inductor pair surrounds and is isolated from the at least one other inductor pair.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Won Mun, Seong-Han Ryu, Il-Ku Nam
  • Publication number: 20110084791
    Abstract: An integrated circuit (IC) includes multiple circuits isolated with respect to one another. Each circuit of the multiple circuits includes an inductor pair formed in a loop pattern on a same layer as at least one other inductor pair from another circuit of the multiple circuits, such that the inductor pair surrounds and is isolated from the at least one other inductor pair.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 14, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Won Mun, Seong-Han Ryu, Il-Ku Nam
  • Patent number: 7877077
    Abstract: A multi-band low noise amplifier (LNA) includes multiple low noise amplifying circuits configured to selectively operate in corresponding frequency bands. The low noise amplifying circuits include corresponding amplifying units and degenerating units. The degenerating units include first inductors, which are arranged in loop patterns isolated from each other on a same layer, such that one first inductor surrounds at least one other first inductor. A current flows through a selected first inductor included in a selected low noise amplifying circuit of the low noise amplifying circuits.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: January 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Won Mun, Seong-Han Ryu, Il-Ku Nam
  • Patent number: 7860468
    Abstract: A programmable variable gain amplifier includes at least three amplifiers. A first amplifier is configured to amplify an input signal. A second amplifier, which includes a programmable output load stage, is configured to receive an output signal from the first amplifier and to output a first differential output signal. The output load stage includes multiple first switches and multiple first diode-connected transistors that are open-circuited or short-circuited by the first switches. A third amplifier, which includes a programmable current mirror input stage, is configured to receive the first differential output signal from the second amplifier through the current mirror input stage and to output a second differential output signal. The current mirror input stage includes multiple second switches and multiple second transistors that are open-circuited or short-circuited by the plurality of second switches.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: December 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Ku Nam, Byeong-Ha Park, Jong-Dae Bae, Jung-Wook Heo, Ho-Jung Ju, Hyun-Won Mun, Jeong-Hyun Choi
  • Patent number: 7646250
    Abstract: A signal converter includes a signal converting unit and a compensation unit. The signal converting unit generates intermediate differential signals at intermediate nodes in response to a single-ended signal. The compensation unit generates compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals. The compensation unit includes a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes. The signal converter of the present invention may be used to particular advantage in an RF receiver.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: January 12, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Won Mun, Il-Ku Nam, Won Ko
  • Patent number: 7633337
    Abstract: A feedback-type variable gain amplifier including a first field effect transistor, a feedback circuit, and a load circuit. The first field effect transistor receives an input voltage signal through an input node, amplifies the input voltage signal, and outputs the amplified input voltage signal through an output node. The feedback circuit is coupled between the input node and the output node, and generates feedback impedance that is changed in response to a control signal. The load circuit is coupled between the output node and a voltage source, and generates load impedance that is changed in response to the control signal to cancel a change of input impedance due to a change of the feedback impedance. Therefore, since the input impedance is not changed when the gain of the amplifier is changed, a voltage standing wave ratio is good, and a range of gain control is broad.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: December 15, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Ku Nam, Young-Jin Kim, Hyun-Won Mun
  • Publication number: 20090203341
    Abstract: A wireless receiver includes a feedback path, and a main path. The feedback path feeds back a first signal at a predetermined frequency range to remove a desired signal at the predetermined frequency range, and the feedback path to outputs an accumulated blocker error signal. The predetermined frequency range is lower than a radio frequency (RF) range. The main path subtracts the accumulated blocker error signal from a second signal including a blocker signal at the RF range to generate a third signal and down-converts the third signal to output the first signal at the predetermined frequency range.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 13, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Hyun-Won Mun
  • Patent number: 7564298
    Abstract: A voltage reference circuit and a current reference circuit using a vertical bipolar junction transistor (BJT) implemented by a deep N-well complementary metal-oxide semiconductor (CMOS) process, wherein the voltage reference circuit generates a constant reference voltage regardless of temperature and includes an amplifier element having a positive input terminal and a negative input terminal, a first transistor, and a second transistor. The first transistor is electrically connected to the positive input terminal and the second transistor is electrically connected to the negative input terminal. Each of the first and second transistors is a vertical BJT implemented by a deep N-well CMOS process, and the reference voltage is calculated by adding a base-emitter voltage of one of the first and second transistors to a value obtained by multiplying a thermal voltage by a predetermined factor.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: July 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Won Mun, Il-Ku Nam, Sang-Yeob Lee, Min-Kyu Je
  • Patent number: 7489200
    Abstract: A gain controllable wide-band low noise amplifier includes a first transistor coupled to an input node and an output node and amplifying an input signal to generate an output signal, a second transistor allowing the output signal to feedback to the input node, and a control circuit complementarily controlling transconductance of the first and second transistors.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: February 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hong Chang, Byeong-Ha Park, Sang-Yeob Lee, Seung-Chan Heo, Han-Gun Chung, Hyun-Won Mun, Min-Kyu Je, Seong-Han Ryu, Kwang-Seok Han
  • Patent number: 7423485
    Abstract: A differential circuit includes main transistors differentially coupled for converting differential input signals into main differential currents at output terminals. The differential circuit also includes compensation transistors coupled to the main transistors for converting the differential input signals into compensation differential currents at the output terminals. Each compensation differential current has an exponential current-voltage characteristic for improving linearity of the differential circuit.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: September 9, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Ku Nam, Hyun-Won Mun
  • Publication number: 20080191807
    Abstract: A signal converter includes a signal converting unit and a compensation unit. The signal converting unit generates intermediate differential signals at intermediate nodes in response to a single-ended signal. The compensation unit generates compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals. The compensation unit includes a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes. The signal converter of the present invention may be used to particular advantage in an RF receiver.
    Type: Application
    Filed: January 14, 2008
    Publication date: August 14, 2008
    Inventors: Hyun-Won Mun, Il-Ku Nam, Won Ko
  • Publication number: 20080119154
    Abstract: A programmable variable gain amplifier includes at least three amplifiers. A first amplifier is configured to amplify an input signal. A second amplifier, which includes a programmable output load stage, is configured to receive an output signal from the first amplifier and to output a first differential output signal. The output load stage includes multiple first switches and multiple first diode-connected transistors that are open-circuited or short-circuited by the first switches. A third amplifier, which includes a programmable current mirror input stage, is configured to receive the first differential output signal from the second amplifier through the current mirror input stage and to output a second differential output signal. The current mirror input stage includes multiple second switches and multiple second transistors that are open-circuited or short-circuited by the plurality of second switches.
    Type: Application
    Filed: November 1, 2007
    Publication date: May 22, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Il-Ku NAM, Byeong-Ha PARK, Jong-Dae BAE, Jung-Wook HEO, Ho-Jung JU, Hyun-Won MUN, Jeong-Hyun CHOI
  • Publication number: 20080106304
    Abstract: An amplifier circuit includes: an amplification transistor, which is connected to an input node and an output node, amplifying an input signal and generating an output signal; and a load connected between the output node and a predetermined power supply node, wherein the amplification transistor is a vertical bipolar junction transistor. A variable gain amplifier circuit includes: a voltage converter converting a control voltage and outputting a converted control voltage; and an amplification transistor receiving the converted control signal from the voltage converter and amplifying an input signal to output an output signal whose gain is proportional to the control voltage, wherein the amplification transistor is a vertical bipolar junction transistor.
    Type: Application
    Filed: November 16, 2006
    Publication date: May 8, 2008
    Inventors: Hyun-Won Mun, Il-Ku Nam
  • Publication number: 20080096516
    Abstract: A multi-band low noise amplifier (LNA) includes multiple low noise amplifying circuits configured to selectively operate in corresponding frequency bands. The low noise amplifying circuits include corresponding amplifying units and degenerating units. The degenerating units include first inductors, which are arranged in loop patterns isolated from each other on a same layer, such that one first inductor surrounds at least one other first inductor. A current flows through a selected first inductor included in a selected low noise amplifying circuit of the low noise amplifying circuits.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 24, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Won MUN, Seong-Han RYU, Il-Ku NAM
  • Publication number: 20080055005
    Abstract: A feedback-type variable gain amplifier including a first field effect transistor, a feedback circuit, and a load circuit. The first field effect transistor receives an input voltage signal through an input node, amplifies the input voltage signal, and outputs the amplified input voltage signal through an output node. The feedback circuit is coupled between the input node and the output node, and generates feedback impedance that is changed in response to a control signal. The load circuit is coupled between the output node and a voltage source, and generates load impedance that is changed in response to the control signal to cancel a change of input impedance due to a change of the feedback impedance. Therefore, since the input impedance is not changed when the gain of the amplifier is changed, a voltage standing wave ratio is good, and a range of gain control is broad.
    Type: Application
    Filed: May 25, 2007
    Publication date: March 6, 2008
    Inventors: Il-Ku NAM, Young-Jin Kim, Hyun-Won Mun
  • Publication number: 20070182478
    Abstract: A voltage reference circuit and a current reference circuit using a vertical bipolar junction transistor (BJT) implemented by a deep N-well complementary metal-oxide semiconductor (CMOS) process, wherein the voltage reference circuit generates a constant reference voltage regardless of temperature and includes an amplifier element having a positive input terminal and a negative input terminal, a first transistor, and a second transistor. The first transistor is electrically connected to the positive input terminal and the second transistor is electrically connected to the negative input terminal. Each of the first and second transistors is a vertical BJT implemented by a deep N-well CMOS process, and the reference voltage is calculated by adding a base-emitter voltage of one of the first and second transistors to a value obtained by multiplying a thermal voltage by a predetermined factor.
    Type: Application
    Filed: December 8, 2006
    Publication date: August 9, 2007
    Inventors: Hyun-Won Mun, Il-Ku Nam, Sang-Yeob Lee, Min-Kyu Je
  • Publication number: 20070164826
    Abstract: A gain controllable wide-band low noise amplifier includes a first transistor coupled to an input node and an output node and amplifying an input signal to generate an output signal, a second transistor allowing the output signal to feedback to the input node, and a control circuit complementarily controlling transconductance of the first and second transistors.
    Type: Application
    Filed: October 27, 2006
    Publication date: July 19, 2007
    Inventors: Jae-Hong Chang, Byeong-Ha Park, Sang-Yeob Lee, Seung-Chan Heo, Han-Gun Chung, Hyun-Won Mun, Min-Kyu Je, Seong-Han Ryu, Kwang-Seok Han
  • Publication number: 20070096813
    Abstract: A differential circuit includes main transistors differentially coupled for converting differential input signals into main differential currents at output terminals. The differential circuit also includes compensation transistors coupled to the main transistors for converting the differential input signals into compensation differential currents at the output terminals. Each compensation differential current has an exponential current-voltage characteristic for improving linearity of the differential circuit.
    Type: Application
    Filed: May 31, 2006
    Publication date: May 3, 2007
    Inventors: Il-Ku Nam, Hyun-Won Mun