Patents by Inventor Hyun-Wook Jung

Hyun-Wook Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250249475
    Abstract: A slot die coater includes a slot die configured to include a first slot through which a first active material is dispensed, a second slot through which a second active material is dispensed, and a third slot through which a third active material is dispensed; and a first spacer, a second spacer, and a third spacer inserted into the first, second, and third slots, respectively, wherein the first, second, and third slots are sequentially aligned in a direction of travel in which a substrate moves to form an active material coating layer having a multilayer in which the active materials dispensed through the first, second, and third spacers are stacked.
    Type: Application
    Filed: July 15, 2024
    Publication date: August 7, 2025
    Inventors: Jin Seok PARK, Hyun NAM, Juhye BAE, Taeil LEE, Hyun Wook JUNG, Sanghun JEE, Donguk KIM
  • Publication number: 20250038069
    Abstract: In a method of manufacturing a packaging unit, a material layer is stacked for forming the semiconductor device on one surface of a substrate, a semiconductor device is formed by performing a semiconductor process on the material layer, a flow channel through which a cooling fluid flows is formed on the other surface of the substrate to enable direct cooling of the semiconductor device using the cooling fluid, a packaging block is disposed at a position spaced apart from the substrate for packaging of the semiconductor device, and an electrode placed on the packaging block is electrically connected to the semiconductor device, and a heat sink unit having a flow path forming portion in which a flow path communicating with the flow channel of the substrate is formed is arranged below the packaging block, and the substrate is combined with the heat sink unit.
    Type: Application
    Filed: October 18, 2024
    Publication date: January 30, 2025
    Inventors: HYOUNG SOON LEE, MIN SOO KANG, HAE CHEON KIM, HYUN WOOK JUNG, HO KYUN AHN, JONG WON LIM
  • Patent number: 12176306
    Abstract: An apparatus and method for generating an electrical circuit of semiconductor channel resistor including a first passive element part including a resistor and a capacitor connected in parallel between a first port and a second port, and an ohmic resistor connected in series to the resistor and the capacitor which are connected in parallel are provided. The apparatus includes a substrate selection part configured to receive a selected substrate item; a resistor selection part configured to receive a selected resistor item; a capacitor selection part configured to receive a selected capacitor item; and a circuit generating part configured to generate an electrical circuit from the selected substrate item, the selected resistor item, and the selected capacitor item.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: December 24, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Heung Lee, Soo Cheol Kang, Seong Il Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Jong Won Lim, Sung Jae Chang, Hyun Wook Jung
  • Patent number: 12166101
    Abstract: A method of manufacturing a high-electron-mobility transistor device is provided. The method includes sequentially forming a transition layer and a semiconductor layer on a substrate, etching a portion of a surface of the semiconductor layer to form a barrier layer region having a certain depth and forming a barrier layer in the barrier layer region, forming a source electrode and a drain electrode on a 2-dimensional electron gas (2-DEG) layer upward exposed at a surface of the semiconductor layer, in defining the 2-DEG layer formed along an interface between the semiconductor layer and the barrier layer, forming a passivation layer on the semiconductor layer, the barrier layer, the source electrode, and the drain electrode and etching a portion of the passivation layer to upward expose the source electrode, the drain electrode, and the barrier layer, and forming a gate electrode on the upward exposed barrier layer.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: December 10, 2024
    Assignee: ELECTRONICS AND TELECOMMINICATIONS RESEARCH INSTITUTE
    Inventors: Soo Cheol Kang, Hyun Wook Jung, Seong IL Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Sang Heung Lee, Jong Won Lim, Sung Jae Chang, Il Gyu Choi
  • Patent number: 12131978
    Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: October 29, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Il Gyu Choi, Seong Il Kim, Hae Cheon Kim, Youn Sub Noh, Ho Kyun Ahn, Sang Heung Lee, Jong Won Lim, Sung Jae Chang, Hyun Wook Jung
  • Publication number: 20240266251
    Abstract: A direct cooling type semiconductor package unit includes a substrate made of a material capable of manufacturing a semiconductor device, and having a material layer for forming the semiconductor device stacked on one side of the substrate, and a flow channel through which a cooling fluid flows formed on the other side of the substrate to enable direct cooling of the semiconductor device using the cooling fluid; a packaging block disposed at a position spaced apart from the substrate for packaging the semiconductor device, and having an electrode electrically connected to the semiconductor device through wiring and placed thereon to be insulated; a heat sink unit disposed on a lower side of the packaging block and having a fluid movement region formed at a position corresponding to a flow channel of the substrate; and a thin film type structure disposed between the substrate and the heat sink unit for coupling between the substrate and the heat sink unit and being moldable to have pattern structures of variou
    Type: Application
    Filed: February 4, 2024
    Publication date: August 8, 2024
    Inventors: Jun Rae PARK, Min Soo KANG, Hae Cheon KIM, Hyoung Soon LEE, Sung Jae CHANG, Hyun Wook JUNG, Il Gyu CHOI, Seong Il KIM, Sang Heung LEE, Ho Kyun AHN, Jong Won LIM
  • Publication number: 20240266253
    Abstract: Provided is a direct cooling device for an integrated circuit configured to form a direct cooling portion with a flow channel through which cooling fluid may flow in a through via hole of a substrate constituting the integrated circuit, and to couple the substrate to a heat sink unit through a bonding portion formed integrally with the direct cooling portion, unlike the prior art in which only a ground circuit is possible through the through via hole, which derives the effect of increasing product reliability due to improved thermal management efficiency of the integrated circuit by directly cooling the semiconductor device as well as the ground circuit, and the effect of simplifying and miniaturizing the structure by implementing the cooling function using a circuit for grounding the semiconductor device even without forming an additional flow path structure for cooling the semiconductor device.
    Type: Application
    Filed: February 4, 2024
    Publication date: August 8, 2024
    Inventors: Min Soo KANG, Jun Rae PARK, Hae Cheon KIM, Hyoung Soon LEE, Sung Jae CHANG, Hyun Wook JUNG, Il Gyu CHOI, Seong Il KIM, Sang Heung LEE, Ho Kyun AHN, Jong Won LIM
  • Patent number: 12042789
    Abstract: A catalyst for purifying exhaust gas includes a first catalyst including a first metal oxide on which platinum (Pt) and rhodium (Rh) are supported, and a second catalyst including a second metal oxide on which palladium (Pd) and platinum (Pt) are supported, wherein the first catalyst and the second catalyst are physically mixed.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: July 23, 2024
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, Korea University Research and Business Foundation
    Inventors: Kwan Young Lee, Dalyoung Yoon, Hyoseong Woo, Eun Jun Lee, Haney Park, Hyun Wook Jung
  • Publication number: 20240055575
    Abstract: A method of preparing a negative electrode for a rechargeable lithium battery and a rechargeable lithium battery including the negative electrode, and the method of preparing the negative electrode may include preparing an active material layer on a current collector so that a coated portion in which the active material layer is formed and an uncoated region in which an active material is not formed are alternatively arranged, the active material, wherein the coated portion is formed by coating a first negative active material layer composition having a capillary number of about 0.25 to about 1.50 on the current collector and coating a second negative active material layer composition having a capillary number of about 0.28 to about 1.50 on the first negative active material layer composition.
    Type: Application
    Filed: August 3, 2023
    Publication date: February 15, 2024
    Inventors: Gwangwon PARK, Won-Gi AHN, Min-young JEONG, Taeil LEE, Juhye BAE, Jin Seok PARK, Hyun Wook JUNG, Kwan Young LEE
  • Publication number: 20230361000
    Abstract: A packaging unit for direct cooling of a semiconductor device according to an embodiment includes a substrate made of a material capable of manufacturing the semiconductor device, having a material layer for forming the semiconductor device stacked on one side thereof, and a flow channel through which a cooling fluid flows formed on the other surface thereof to enable direct cooling of the semiconductor device using the cooling fluid, a packaging block disposed at a position spaced apart from the substrate for packaging of the semiconductor device, electrically connected to the semiconductor device using an electrode, and insulated from the semiconductor device using the electrode disposed on an insulating block, and a heat sink unit disposed below the packaging block and including a flow path forming portion in which a flow path communicating with the flow channel of the substrate is formed.
    Type: Application
    Filed: August 9, 2022
    Publication date: November 9, 2023
    Inventors: Hyoung Soon LEE, Min Soo KANG, Hae Cheon KIM, Hyun Wook JUNG, Ho Kyun AHN, Jong Won LIM
  • Patent number: 11779953
    Abstract: A slot die for manufacturing a rechargeable battery electrode includes a first block with a chamber to accommodate an active material slurry, a second block facing and attached to the first block, a shim between the first and second blocks and including facing end portions, and a slot between the first and second blocks, and between the facing end portions, the slot including a first side defined by the first block, and a second side defined by the second block and facing the first side. Each of the end portions of the shim includes a width adjuster protruding to a second reference point from a first reference point in a width direction by a first adjusting width, extending to a third reference point from the second reference point at a first angle with respect to a discharging direction, and having a first adjusting length in the discharging direction.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: October 10, 2023
    Assignees: SAMSUNG SDI CO., LTD., KOREA UNIVERSITY Research and Business Foundation
    Inventors: Won-Gi Ahn, Yongho Kim, Jin Seok Park, Juhye Bae, Hyeri Eom, Min-young Jeong, Hyun Wook Jung
  • Publication number: 20230278019
    Abstract: A catalyst for purifying exhaust gas includes a first catalyst including a first metal oxide on which platinum (Pt) and rhodium (Rh) are supported, and a second catalyst including a second metal oxide on which palladium (Pd) and platinum (Pt) are supported, wherein the first catalyst and the second catalyst are physically mixed.
    Type: Application
    Filed: December 1, 2022
    Publication date: September 7, 2023
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, Korea University Research and Business Foundation
    Inventors: Kwan Young Lee, Dalyoung Yoon, Hyoseong Woo, Eun Jun Lee, Haney Park, Hyun Wook Jung
  • Publication number: 20230256421
    Abstract: Provided is a carbon monoxide and hydrocarbon oxidation catalyst that includes a core-shell nanoparticle including a cobalt (Co) nanoparticle core having a hexahedral shape, and a shell surrounding the cobalt nanoparticle core and including cerium oxide.
    Type: Application
    Filed: October 18, 2022
    Publication date: August 17, 2023
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, Korea University Research and Business Foundation
    Inventors: Kwan-Young Lee, Dalyoung Yoon, Hyun Wook Jung, Haney Park, Eun Jun Lee, Hyoseong Woo
  • Publication number: 20230054026
    Abstract: Provided are a nitride-based high electron mobility transistor having enhanced frequency characteristics and an improved structural stability and manufacturing method thereof. The nitride-based high electron mobility transistor includes a first semiconductor layer and a second semiconductor layer sequentially formed on a substrate, source drain electrodes formed on the second semiconductor layer, a first insulating film formed on the second semiconductor layer and having an opening, a dielectric formed on the first insulating film to surround the opening of the first insulating film, a second insulating film formed on an inner sidewall of the dielectric, and a gate electrode formed on the dielectric to fill the opening of the first insulating film and inside the inner sidewall of the dielectric. A width of the inner sidewall at a bottom end of the dielectric is smaller than a width of the inner sidewall at a top end of the dielectric.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 23, 2023
    Inventors: Hyun Wook JUNG, Seong II KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, II Gyu CHOI
  • Publication number: 20220285244
    Abstract: The present invention improves a heat dissipation property of a semiconductor device by transferring hexagonal boron nitride (hBN) with a two-dimensional nanostructure to the semiconductor device. A semiconductor device of the present invention includes a substrate having a first surface and a second surface, a semiconductor layer formed on the first surface of the substrate, an hBN layer formed on at least one surface of the first surface and the second surface of the substrate, and a heat sink positioned on the second surface of the substrate. A radiation rate of heat generated during driving of an element is increased to decrease a reduction in lifetime of a semiconductor device due to a temperature increase. The semiconductor device has a structure and configuration which are very effective in improving a rapid temperature increase due to heat generated by high-power semiconductor devices.
    Type: Application
    Filed: December 27, 2021
    Publication date: September 8, 2022
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Il Gyu CHOI, Seong Il KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Hyun Wook JUNG
  • Publication number: 20220262922
    Abstract: A method of manufacturing a high-electron-mobility transistor device is provided. The method includes sequentially forming a transition layer and a semiconductor layer on a substrate, etching a portion of a surface of the semiconductor layer to form a barrier layer region having a certain depth and forming a barrier layer in the barrier layer region, forming a source electrode and a drain electrode on a 2-dimensional electron gas (2-DEG) layer upward exposed at a surface of the semiconductor layer, in defining the 2-DEG layer formed along an interface between the semiconductor layer and the barrier layer, forming a passivation layer on the semiconductor layer, the barrier layer, the source electrode, and the drain electrode and etching a portion of the passivation layer to upward expose the source electrode, the drain electrode, and the barrier layer, and forming a gate electrode on the upward exposed barrier layer.
    Type: Application
    Filed: February 14, 2022
    Publication date: August 18, 2022
    Inventors: Soo Cheol KANG, Hyun Wook JUNG, Seong Il KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Il Gyu CHOI
  • Publication number: 20220045022
    Abstract: An apparatus and method for generating an electrical circuit of semiconductor channel resistor including a first passive element part including a resistor and a capacitor connected in parallel between a first port and a second port, and an ohmic resistor connected in series to the resistor and the capacitor which are connected in parallel are provided. The apparatus includes a substrate selection part configured to receive a selected substrate item; a resistor selection part configured to receive a selected resistor item; a capacitor selection part configured to receive a selected capacitor item; and a circuit generating part configured to generate an electrical circuit from the selected substrate item, the selected resistor item, and the selected capacitor item.
    Type: Application
    Filed: August 6, 2021
    Publication date: February 10, 2022
    Inventors: Sang Heung LEE, Soo Cheol KANG, Seong Il KIM, Hae Cheon KIM, Youn Sub NOH, Ho Kyun AHN, Jong Won LIM, Sung Jae CHANG, Hyun Wook JUNG
  • Publication number: 20220045679
    Abstract: Provided is a single pole double through (SPDT) switch including a series switching unit including first and second series switching elements commonly connected to a common input port, and a shunt switching unit including a plurality of shunt switching elements connected in parallel to a first signal path connecting the common input port to a first output port and a second signal path connecting the common input port to a second output port, wherein first and second inductors are respectively connected to gate terminals of the first and second series switching elements.
    Type: Application
    Filed: August 6, 2021
    Publication date: February 10, 2022
    Inventors: Youn Sub NOH, Soo Cheol KANG, Seong Il KIM, Hae Cheon KIM, Ho Kyun AHN, Sang Heung LEE, Jong Won LIM, Sung Jae CHANG, Hyun Wook JUNG
  • Publication number: 20210151732
    Abstract: A slot die for manufacturing a rechargeable battery electrode includes a first block with a chamber to accommodate an active material slurry, a second block facing and attached to the first block, a shim between the first and second blocks and including facing end portions, and a slot between the first and second blocks, and between the facing end portions, the slot including a first side defined by the first block, and a second side defined by the second block and facing the first side. Each of the end portions of the shim includes a width adjuster protruding to a second reference point from a first reference point in a width direction by a first adjusting width, extending to a third reference point from the second reference point at a first angle with respect to a discharging direction, and having a first adjusting length in the discharging direction.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 20, 2021
    Inventors: Won-Gi AHN, Yongho KIM, Jin Seok PARK, Juhye BAE, Hyeri EOM, Min-young JEONG, Hyun Wook JUNG
  • Patent number: 10525498
    Abstract: A slot coating apparatus having an improved coating bead region is disclosed. An embodiment of the invention provides a slot coating apparatus configured to coat a coating liquid containing a high concentration of particles over a substrate, where the slot coating apparatus includes: a first slot die that is arranged at a downstream side of the coating liquid; a second slot die that is arranged at an upstream side of the coating liquid and is positioned facing the first slot die; a coating bead cover that extends from one side of the first slot die along a movement direction of the substrate; and a pressure adjustment device that is disposed at the second slot die side and is configured to form a pressure gradient between the downstream and the upstream.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 7, 2020
    Assignee: Korea University Research and Businss Foundation
    Inventors: Hyun Wook Jung, Byoung Jin Chun, Kwan Young Lee, Jin Seok Park, Gi Wook Lee, Won Gi Ahn