Patents by Inventor Hyun Yul Kwon

Hyun Yul Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9390963
    Abstract: A semiconductor memory device includes a plurality of auxiliary patterns formed over a semiconductor substrate, a plurality of gate line patterns disposed in parallel with one another over the semiconductor substrate between the plurality of auxiliary patterns, and an air gap formed between the plurality of gate line patterns and between each of the plurality of gate line patterns and each of the auxiliary patterns.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: July 12, 2016
    Assignee: SK Hynix Inc.
    Inventors: Tae Kyung Kim, Hyun Yul Kwon
  • Publication number: 20150099343
    Abstract: A semiconductor memory device includes a plurality of auxiliary patterns formed over a semiconductor substrate, a plurality of gate line patterns disposed in parallel with one another over the semiconductor substrate between the plurality of auxiliary patterns, and an air gap formed between the plurality of gate line patterns and between each of the plurality of gate line patterns and each of the auxiliary patterns.
    Type: Application
    Filed: December 12, 2014
    Publication date: April 9, 2015
    Inventors: Tae Kyung KIM, Hyun Yul KWON
  • Patent number: 8937367
    Abstract: A semiconductor memory device includes a plurality of auxiliary patterns formed over a semiconductor substrate, a plurality of gate line patterns disposed in parallel with one another over the semiconductor substrate between the plurality of auxiliary patterns, and an air gap formed between the plurality of gate line patterns and between each of the plurality of gate line patterns and each of the auxiliary patterns.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: January 20, 2015
    Assignee: SK Hynix Inc.
    Inventors: Tae Kyung Kim, Hyun Yul Kwon
  • Publication number: 20140042588
    Abstract: A semiconductor memory device includes a plurality of auxiliary patterns formed over a semiconductor substrate, a plurality of gate line patterns disposed in parallel with one another over the semiconductor substrate between the plurality of auxiliary patterns, and an air gap formed between the plurality of gate line patterns and between each of the plurality of gate line patterns and each of the auxiliary patterns.
    Type: Application
    Filed: March 13, 2013
    Publication date: February 13, 2014
    Applicant: SK HYNIX INC.
    Inventors: Tae Kyung KIM, Hyun Yul KWON
  • Publication number: 20120122282
    Abstract: A method of manufacturing semiconductor devices includes forming a plurality of lines arranged in a direction over a semiconductor substrate, forming mask patterns over the semiconductor substrate wherein the mask patterns intersect the lines, and forming junctions in the semiconductor substrate between the lines by performing an ion implantation process.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 17, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Hyun Yul KWON
  • Patent number: 7718477
    Abstract: This patent relates to a semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes an insulating layer formed in a semiconductor substrate, trenches formed within the insulating layer, silicon layers formed within the trenches, gates formed on the silicon layers, and junctions formed in the silicon layers at both sides of the gates.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: May 18, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyun Yul Kwon
  • Publication number: 20090001475
    Abstract: This patent relates to a semiconductor device and a method of fabricating a semiconductor device. The semiconductor device includes an insulating layer formed in a semiconductor substrate, trenches formed within the insulating layer, silicon layers formed within the trenches, gates formed on the silicon layers, and junctions formed in the silicon layers at both sides of the gates.
    Type: Application
    Filed: December 26, 2007
    Publication date: January 1, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Hyun Yul Kwon