Patents by Inventor Hyun Chul Yoon
Hyun Chul Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965936Abstract: A battery diagnosis apparatus for diagnosing a battery including battery cells, the apparatus according to an embodiment may include a voltage measurer for measuring the voltage of each battery cell during a preset period of time, a voltage variation calculator for calculating an individual voltage variation of each battery cell during the preset period of time, an average voltage variation calculator for calculating an average voltage variation of the battery cells during the preset period of time, and an abnormality detector for determining that a voltage abnormality has occurred in at least one battery cell among the battery cells when a difference between the voltage variation of the at least one battery cell and the average voltage variation of the at least one battery cell is greater than a threshold value.Type: GrantFiled: July 23, 2020Date of Patent: April 23, 2024Assignee: LG ENERGY SOLUTION, LTD.Inventors: Hyun Chul Lee, Dong Keun Kwon, Sung Yul Yoon, Seung Hyun Kim, An Soo Kim
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Publication number: 20240125698Abstract: A gadget for retroreflected signal measurement is disclosed. The gadget for measuring the retroreflected signal includes a partitioning wall; a portable terminal receiving portion disposed on one surface of the partitioning wall; a biosensor receiving portion disposed on the other surface of the partitioning wall and constructed to receive a biosensor therein; a light exit channel defined in the partitioning wall and at one side thereof; and a light-receiving channel adjacent to the light exit channel and defined in the partitioning wall, wherein light passes through the light exit channel and then is reflected from the biosensor, and then is incident into the light-receiving channel.Type: ApplicationFiled: February 10, 2022Publication date: April 18, 2024Applicant: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Hyun Chul YOON, Ka Ram KIM, Kyung Wom LEE, Jae-ho KIM
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Patent number: 11924988Abstract: A display apparatus including a display and a supporter. The supporter being mounted on the display and configured to support the display and rotate the display module between a first position and a second position. The supporter including a drive motor, a first gear, and a detection sensor. The drive motor configured to supply a driving force to rotate the display. The first gear configured to rotate together with the display by receiving the driving force from the drive motor. The detection sensor configured to detect a rotation amount of a second gear configured to rotate in with the first gear.Type: GrantFiled: December 23, 2022Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyun Yong Choi, Young Chul Kim, Ji Su Kim, Hun Sung Kim, Sung Yong Park, Jin Soo Shin, Dae Sik Yoon, Yong Yeon Hwang
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Patent number: 11913064Abstract: An optical gene biosensor is disclosed. The optical gene biosensor includes a substrate; a molecular beacon anchored to the substrate, wherein the molecular beacon includes an oligonucleotide specifically binding to a target nucleic acid molecule and a first compound bound to a first terminal of the oligonucleotide; an optical marker specifically binding to the first compound, wherein the optical marker is configured to retro-reflect irradiated light; a light source for irradiating the optical marker with light; and a light-receiver for receiving light retro-reflected from the optical marker. The optical gene biosensor may perform accurate quantitative analysis of a target nucleic acid molecule using both non-spectral and spectral light sources.Type: GrantFiled: March 9, 2018Date of Patent: February 27, 2024Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Hyun-Chul Yoon, Jae-Ho Kim, Yong-Duk Han, Hyeong-Jin Chun
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Publication number: 20230420034Abstract: In a sense amplifier circuit, a first transistor is electrically connected between a first bitline and a first node, a first inverter includes a first input terminal and a first output terminal connected to the first node, and a second inverter includes a second input terminal connected to a second node and a second output terminal. A second transistor is electrically connected between the first output terminal and the second node, and a third transistor is electrically connected between the second output terminal and the first node. A precharge circuit transfers a first voltage to the first and second nodes during a first period, and transfers a second voltage higher than the first voltage to the first and second nodes during a second period.Type: ApplicationFiled: October 12, 2022Publication date: December 28, 2023Inventors: Changyoung Lee, Kyu-Chang Kang, Donghak Shin, Hyun-Chul Yoon
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Publication number: 20230213507Abstract: An optical probe for a bio-sensor selectively conjugated to a target analyte and configured to retro-reflect incident light thereto is disclosed. The optical probe for the bio-sensor includes: a transparent core particle; a total-reflection inducing layer covering a portion of a surface of the core particle, the inducing layer is made of a material having a refractive index lower than a refractive index of the core; a modifying layer formed on the total-reflection inducing layer; and an analyte-sensing substance bound to the modifying layer, the sensing substance is selectively conjugated to the target analyte. This optical probe may serve as an excellent optical probe for both a non-spectral light source and a spectral light source.Type: ApplicationFiled: March 9, 2023Publication date: July 6, 2023Applicant: Industry-Academic Cooperation Foundation of Ajou UniversityInventors: Hyun-Chul YOON, Yong-Duk HAN, Jae-Ho KIM
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Publication number: 20230094529Abstract: A semiconductor memory device includes active sections that include first and second impurity regions and are defined by a device isolation layer. Word lines extend in a first direction on the active sections. Intermediate dielectric patterns cover top surfaces of the word lines. Bit-line structures extend on the word lines in a second direction intersecting the first direction. Contact plugs are disposed between the bit-line structures and are connected to the second impurity regions. Data storage elements are disposed on the contact plugs. The intermediate dielectric pattern includes a capping part that covers the top surfaces of the word lines and is buried in the substrate. Fence parts extend between the bit-line structures from the capping part.Type: ApplicationFiled: June 16, 2022Publication date: March 30, 2023Inventors: JINYOUNG PARK, Sangwuk Park, Hyun-Chul Yoon, Jungpyo Hong
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Patent number: 11610898Abstract: Disclosed are semiconductor devices and their fabrication methods. The method includes forming an etching target on a substrate including cell and key regions, forming lower and upper mask layers on the etching target, performing photolithography to form an upper mask pattern including a hole on the cell region, a preliminary key pattern on the key region, a bar pattern on the key region, and a trench between the preliminary key pattern and the bar pattern, forming pillar and dam patterns filling the hole and the trench, performing photolithography to remove the upper mask pattern except for the bar pattern, using the pillar pattern, the dam pattern, and the bar pattern as an etching mask to form a lower mask pattern, and using the lower mask pattern as an etching mask to form an etching target pattern on the cell region and a key pattern on the key region.Type: GrantFiled: April 22, 2021Date of Patent: March 21, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyun-Chul Yoon, Sungun Kwon, Hanseung Kwak, Jihee Kim, Sunghoon Choi
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Publication number: 20220334105Abstract: A bio-substance analysis method using a sensing substrate having a fluid channel is disclosed. The method includes mixing retroreflective particles with a detection solution containing a target bio-substance, wherein a first bio-recognition substance selectively reacting with the target bio-substance is modified on the retroreflective particles; placing the sensing substrate so that a bottom is located under a cover in a direction of gravity; injecting the detection solution containing therein the retroreflective particles into a fluid channel and maintaining the solution in the channel for a first time duration; turning the sensing substrate upside down so that the bottom is located above the cover in the direction of gravity and maintaining the sensing substrate in the turned state for a second time duration; irradiating light into the fluid channel through the bottom; and generating and analyzing an image based on light retroreflected from the retroreflective particles.Type: ApplicationFiled: November 26, 2019Publication date: October 20, 2022Applicant: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Hyun Chul YOON, Ka Ram KIM, Hyeong Jin CHUN, Jae Ho KIM
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Publication number: 20220115383Abstract: Disclosed are semiconductor devices and their fabrication methods. The method includes forming an etching target on a substrate including cell and key regions, forming lower and upper mask layers on the etching target, performing photolithography to form an upper mask pattern including a hole on the cell region, a preliminary key pattern on the key region, a bar pattern on the key region, and a trench between the preliminary key pattern and the bar pattern, forming pillar and dam patterns filling the hole and the trench, performing photolithography to remove the upper mask pattern except for the bar pattern, using the pillar pattern, the dam pattern, and the bar pattern as an etching mask to form a lower mask pattern, and using the lower mask pattern as an etching mask to form an etching target pattern on the cell region and a key pattern on the key region.Type: ApplicationFiled: April 22, 2021Publication date: April 14, 2022Inventors: HYUN-CHUL YOON, SUNGUN KWON, HANSEUNG KWAK, JIHEE KIM, SUNGHOON CHOI
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Publication number: 20210189471Abstract: An optical gene biosensor is disclosed. The optical gene biosensor includes a substrate; a molecular beacon anchored to the substrate, wherein the molecular beacon includes an oligonucleotide specifically binding to a target nucleic acid molecule and a first compound bound to a first terminal of the oligonucleotide; an optical marker specifically binding to the first compound, wherein the optical marker is configured to retro-reflect irradiated light; a light source for irradiating the optical marker with light; and a light-receiver for receiving light retro-reflected from the optical marker. The optical gene biosensor may perform accurate quantitative analysis of a target nucleic acid molecule using both non-spectral and spectral light sources.Type: ApplicationFiled: March 9, 2018Publication date: June 24, 2021Applicant: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Hyun-Chul YOON, Jae-Ho KIM, Yong-Duk HAN, Hyeong-Jin CHUN
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Patent number: 10580688Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.Type: GrantFiled: July 17, 2018Date of Patent: March 3, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Chul Yoon, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang
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Patent number: 10510429Abstract: A memory device including a memory cell array connected to a first bit line, first word lines, and second word lines, the memory cell array including a first memory cell and a second memory cell, the first memory cell being connected between the first word lines and the first bit line, and the second memory cell being connected between the second word line and the first bit line; a first word line driver configured to drive the first word lines; a second word line driver configured to drive the second word lines; and a test manager configured to drive second word lines to change a capacitance of the first bit line, and after the capacitance of the first bit line is changed, drive first word lines to test the first word lines.Type: GrantFiled: June 13, 2018Date of Patent: December 17, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jin-yong Choi, Kyung-ryun Kim, Woong-dai Kang, Hyun-chul Yoon
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Patent number: 10497460Abstract: A semiconductor memory device may include a memory cell array and an access control circuit. The memory cell array may include a first cell region and a second cell region. The access control circuit may access the first cell region and the second cell region differently in response to a command, an access address and fuse information to identify the first cell region and the second cell region. The command and the address may be provided from an external device.Type: GrantFiled: June 29, 2018Date of Patent: December 3, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyung-Ryun Kim, Hyun-Chul Yoon
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Publication number: 20190214295Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.Type: ApplicationFiled: July 17, 2018Publication date: July 11, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun-Chul YOON, Yeong-Shin Park, Joonghee Kim, Jihee Kim, Dongjun Shin, Kukhan Yoon, Taeseop Choi, Jungheun Hwang
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Publication number: 20190130987Abstract: A memory device including a memory cell array connected to a first bit line, first word lines, and second word lines, the memory cell array including a first memory cell and a second memory cell, the first memory cell being connected between the first word lines and the first bit line, and the second memory cell being connected between the second word line and the first bit line; a first word line driver configured to drive the first word lines; a second word line driver configured to drive the second word lines; and a test manager configured to drive second word lines to change a capacitance of the first bit line, and after the capacitance of the first bit line is changed, drive first word lines to test the first word lines.Type: ApplicationFiled: June 13, 2018Publication date: May 2, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Jin-yong CHOI, Kyung-ryun KIM, Woong-dai KANG, Hyun-chul YOON
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Patent number: 10262935Abstract: A memory device including a memory cell array region, includes, column selection signal lines formed in a first column conduction layer of the memory cell array region and extending in a column direction, global input-output data lines formed in a second column conduction layer of the memory cell array region different from the first column conduction layer and extending in the column direction and power lines formed in a shield conduction layer of the memory cell array region between the first column conduction layer and the second column conduction layer. The noises in the signal lines and the power lines may be reduced and performance of the memory device may be enhanced by forming the column selection signal lines and the global input-output data lines in different column conduction layers and forming the power lines in the shield conduction layer between the column conduction layers.Type: GrantFiled: August 15, 2017Date of Patent: April 16, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Young-Ju Kim, Su-A Kim, Soo-Young Kim, Min-Woo Won, Bok-Yeon Won, Ji-Suk Kwon, Young-Ho Kim, Ji-Hak Yu, Hyun-Chul Yoon, Seok-Jae Lee, Sang-Keun Han, Woong-Dai Kang, Hyuk-Joon Kwon, Bum-Jae Lee
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Publication number: 20190096508Abstract: A semiconductor memory device may include a memory cell array and an access control circuit. The memory cell array may include a first cell region and a second cell region. The access control circuit may access the first cell region and the second cell region differently in response to a command, an access address and fuse information to identify the first cell region and the second cell region. The command and the address may be provided from an external device.Type: ApplicationFiled: June 29, 2018Publication date: March 28, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyung-Ryun KIM, Hyun-Chul YOON
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Publication number: 20180371529Abstract: An optical probe for a bio-sensor selectively conjugated to a target analyte and configured to retro-reflect incident light thereto is disclosed. The optical probe for the bio-sensor includes: a transparent core particle; a total-reflection inducing layer covering a portion of a surface of the core particle, the inducing layer is made of a material having a refractive index lower than a refractive index of the core; a modifying layer formed on the total-reflection inducing layer; and an analyte-sensing substance bound to the modifying layer, the sensing substance is selectively conjugated to the target analyte. This optical probe may serve as an excellent optical probe for both a non-spectral light source and a spectral light source.Type: ApplicationFiled: December 30, 2015Publication date: December 27, 2018Applicant: Industry-Academic Cooperation Foundation of Ajou U niversityInventors: Hyun-Chul YOON, Yong-Duk HAN, Jae-Ho KIM
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Patent number: 10062571Abstract: A method of manufacturing a semiconductor device includes forming a feature layer on a substrate, forming a plurality of reference patterns, arranged at a first pitch, on the feature layer, forming an organic liner on a side wall of each of the plurality of reference patterns, forming a plurality of buried patterns on the organic liner, removing the organic liner exposed between the plurality of buried patterns and the plurality of reference patterns, and etching the feature layer by using the plurality of buried patterns and the plurality of reference patterns as etch masks to form a feature pattern. Each of the plurality of buried patterns covers a space between side walls of two adjacent reference patterns among the plurality of reference patterns.Type: GrantFiled: November 3, 2016Date of Patent: August 28, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-chul Yoon, Kyoung-seon Kim, Hai-sub Na, Jin Park