Patents by Inventor Hyung Cho

Hyung Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12291266
    Abstract: An embodiment vehicle lower body includes a front lower body and a rear lower body spaced apart from each other in a longitudinal direction, each including multiple pipes and having wheels and a suspension mounted thereto, a pair of lower body main members each having a pipe shape and spaced apart from each other in a lateral direction, the pair of lower body main members connecting upper end sides of the front lower body and the rear lower body and extending in the longitudinal direction to define upper side members of the front lower body and the rear lower body, and a pair of lower body floor members each having a pipe shape and spaced apart from each other in the lateral direction, the pair of lower body floor members connecting lower end sides of the front lower body and the rear lower body.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 6, 2025
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Ji Ae Yong, Seok Ju Gim, Hyung Gyu Park, Ho Yeon Kim, Sun Hyung Cho, Chul Hee Heo, Won Oh Kim
  • Publication number: 20250143152
    Abstract: A display device includes a pixel electrode disposed on a substrate, a bank layer covering edges of the pixel electrode and defining light emitting areas and a non-light emitting area, a light emitting layer on the pixel electrode and the bank layer, a common electrode on the light emitting layer, a capping layer on the common electrode, a counter substrate facing the substrate, and an optical member on the counter substrate. The capping layer comprises a first capping layer disposed on the common electrode, and a second capping layer disposed on the first capping layer and overlapping the light emitting areas.
    Type: Application
    Filed: June 18, 2024
    Publication date: May 1, 2025
    Inventors: Ho Ryun CHUNG, Kook Chol PARK, Sin Ae PARK, Se Joong SHIN, Se Hyung CHO
  • Patent number: 12266664
    Abstract: An embodiment of a display device includes a substrate, a semiconductor layer, a first gate insulating layer, a gate electrode, a second gate insulating layer, a first storage electrode, a first interlayer insulating layer, a second interlayer insulating layer, a data line, and a driving voltage line. The semiconductor layer is disposed on the substrate. The first gate insulating layer is disposed on the semiconductor layer. The gate electrode is positioned on the first insulating layer. The second gate insulating layer is disposed on the gate electrode. The first storage electrode is positioned on the second gate insulating layer. The first interlayer insulating layer is disposed on the first storage electrode and has an opening surrounding the semiconductor layer, the gate electrode, and the first storage electrode. The second interlayer insulating layer is disposed on the first interlayer insulating layer and fills the opening.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: April 1, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seon Young Choi, Jae Hyung Cho, Jee Hoon Sim, Jun Ki Jeong
  • Patent number: 12266400
    Abstract: A method for ZQ calibration for a data transmission driving circuit of each memory die in a memory chip package in which memory dies are stacked, includes generating a reference current through a reference resistor connected between a power terminal supplying a power voltage of the data transmission driving circuit and a ground terminal and a first transistor that is diode-connected; supplying first currents corresponding to the reference currents to a pull-up driver of each memory die; performing ZQ calibration of a pull-up driver of a corresponding memory die by comparing a first voltage formed by each first current with a reference voltage formed by the reference current in each of the plurality of memory dies; and performing ZQ calibration of a pull-down driver of the corresponding memory die based on an output impedance of the ZQ calibrated pull-up driver in each of the memory dies.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: April 1, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Min-Hyung Cho, Young-Deuk Jeon, Jin Ho Han
  • Publication number: 20250091649
    Abstract: A side structure of a vehicle body can include a center pillar formed with a center pillar mounting portion supporting a supporter, and a center pillar bracket to which a center pillar bracket mounting portion is formed to support the supporter, and the center pillar bracket connected to the center pillar.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 20, 2025
    Inventors: Won Ki Song, Jaeseung Lee, Hyungsik Choi, Dae Hee Lee, Jin Ho Hwang, Joonghyun Shin, Sun Hyung Cho
  • Publication number: 20250091661
    Abstract: An embodiment joint structure for a vehicle body includes a front body module that is a stationary part fixable to a front part of an under body of the vehicle body, a rear body module that is a variable part having a preset shape, the rear body module being attachable to and detachable from a rear part of the under body and a rear part of the front body module, a plurality of stationary part coupling modules disposed on an upper end surface portion of a rear edge of the front body module, and a plurality of variable part coupling modules disposed on an upper end surface portion of a front edge of the rear body module and couplable to the stationary part coupling modules by an electromagnetic force.
    Type: Application
    Filed: July 2, 2024
    Publication date: March 20, 2025
    Inventors: Won Ki Song, Jung Taek Lim, Jaeseung Lee, Sun Hyung Cho, Dae Hee Lee, Jin Ho Hwang, Joonghyun Shin, Hyungsik Choi
  • Publication number: 20250091648
    Abstract: An embodiment joint structure of a vehicle body includes a front body module fixed to a front portion of a center floor member of an underbody of the vehicle body, wherein the front body module is a fixed part, a rear body module detachably fixed to a rear portion of the center floor member and a rear portion of the front body module in a set shape, wherein the rear body module is a variable part, a plurality of center floor member coupling modules disposed on the center floor member at the rear portion of the front body module, and a plurality of variable part coupling modules disposed at a lower side of the rear body module and configured to be coupled to the center floor member coupling modules by electromagnetic force.
    Type: Application
    Filed: August 12, 2024
    Publication date: March 20, 2025
    Inventors: Won Ki Song, Jung Taek Lim, Jaeseung Lee, Sun Hyung Cho, Dae Hee Lee, Jin Ho Hwang, Joonghyun Shin, Hyungsik Choi
  • Publication number: 20250091663
    Abstract: A connection structure of a vehicle body can include an under body with an under body mounting unit mounted thereon, and a variable part including a variable part mounting unit selectively connected to the under body mounting unit and an outer cross member mounted on an upper portion of the variable part mounting unit.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 20, 2025
    Inventors: Won Ki Song, Jaeseung Lee, Hyungsik Choi, Dae Hee Lee, Jin Ho Hwang, Joonghyun Shin, Sun Hyung Cho
  • Publication number: 20250078880
    Abstract: An apparatus for correcting output impedance of a memory interface driving circuit, the apparatus comprising: a first PD driver including a plurality of first sub PD drivers connected to each other in parallel; a first control unit configured to sequentially change a first control code, the first control code being a combination of control signals for turning the plurality of first sub PD drivers on or off in each pull-down sweep; and a first comparator configured to generate a first output pattern, the first output pattern being a sequence of 0 or 1 representing a result of comparing an output voltage of the first PD driver generated according to the first control code with a first reference voltage, wherein the first control unit determines a first impedance correction code for the memory interface driving circuit from among the sequentially changing first control codes using the first output pattern.
    Type: Application
    Filed: September 5, 2024
    Publication date: March 6, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Min Hyung CHO, Yi Gyeong KIM, Young Deuk JEON, Young Su KWONG, Su Jin PARK
  • Patent number: 12240547
    Abstract: An embodiment vehicle body includes a drive vehicle body module configured to accommodate a driving part of a vehicle and including a first plurality of frames coupled together and fastening units provided at an upper end of the drive vehicle body module and an upper vehicle body module including a second plurality of frames coupled together, wherein a lower end of the upper vehicle body module is fastened to the fastening units of the drive vehicle body module to define an interior usage space of the vehicle.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: March 4, 2025
    Assignees: Hyundai Motor Company, Kia Corporation
    Inventors: Seok Ju Gim, Ji Ae Yong, Won Oh Kim, Mok Yeon Hong, Sun Hyung Cho, Chul Hee Heo, Ho Yeon Kim
  • Publication number: 20250067841
    Abstract: Disclosed is an ultra-wide band (UWB) radar device including a first antenna circuit including a first transmission circuit, a first reception circuit, a first oscillator that supplies a first clock signal to the first transmission circuit and the first reception circuit, and a first frequency counter, a second antenna circuit including a second transmission circuit, a second reception circuit, a second oscillator that supplies a second clock signal to the second transmission circuit and the second reception circuit, and a second frequency counter, and a controller that detects the target. The controller corrects a frequency error between the first clock signal and the second clock signal and compensates for a synchronization error between the first antenna circuit and the second antenna circuit.
    Type: Application
    Filed: June 4, 2024
    Publication date: February 27, 2025
    Applicant: Electronics and telecommunications Research Institute
    Inventors: Yi-Gyeong KIM, Kyung Hwan Park, Sujin Park, Young-deuk Jeon, Min-Hyung Cho
  • Publication number: 20250052860
    Abstract: Disclosed is a receiver of a radar device, which includes a sampling circuit that receives a reflected pulse signal having a first period reflected from a detection target and samples the reflected pulse signal as a first received signal in response to a clock signal having a second period equal to the first period, an integration circuit that, in response to the clock signal, generates an analog integration signal based on the first received signal and a control signal, a comparison circuit that, in response to the clock signal, adjusts a count value and the control signal based on a result of comparing the analog integration signal with a reference signal and outputs the control signal to the integration circuit, and an ADC circuit that converts the analog integration signal into a digital integration signal.
    Type: Application
    Filed: July 30, 2024
    Publication date: February 13, 2025
    Inventors: Young-deuk JEON, Yi-Gyeong KIM, Kyung Hwan PARK, Sujin PARK, MIN-HYUNG CHO
  • Patent number: 12206420
    Abstract: Disclosed herein are a duty cycle monitoring method and apparatus for a memory interface, including receiving a clock signal as input and generating a first delay time offset and a second delay time offset, receiving the clock signal and the first delay time offset and then outputting a first delayed signal, receiving the first delayed signal and the second delay time offset and then outputting a second delayed signal, receiving the clock signal and the second delayed signal and then outputting a delay value corresponding to a half-period of the clock signal, and monitoring, based on the first delayed signal, whether a duty cycle of the clock signal conforms to a duty cycle specification.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: January 21, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yi-Gyeong Kim, Young-Su Kwon, Su-Jin Park, Young-Deuk Jeon, Min-Hyung Cho, Jae-Woong Choi
  • Publication number: 20240387818
    Abstract: A positive electrode includes a positive electrode current collector and a positive electrode active material layer disposed on at least one surface of the positive electrode current collector. The positive electrode active material layer includes a positive electrode active material and a conductive material. The conductive material includes a linear conductive material. The positive electrode active material includes a lithium composite transition metal oxide containing nickel (Ni), cobalt (Co), and manganese (Mn). The lithium composite transition metal oxide is in the form of a single particle. The positive electrode active material has an average particle diameter (D50) of 2 ?m to 10 ?m. The positive electrode satisfies a specific equation for a BET specific surface area and an amount of the positive electrode active material and the linear conductive material.
    Type: Application
    Filed: October 7, 2022
    Publication date: November 21, 2024
    Applicant: LG Energy Solution, Ltd.
    Inventors: Woo Hyung Cho, Min Ji Heo, Sung Bin Park
  • Patent number: 12134268
    Abstract: The inventive concept provides an inkjet printing method. The inkjet printing method for discharging an ink on a substrate using a head having a plurality of nozzles formed thereon includes determining a grade of nozzles by measuring a discharge performance of the nozzles, which is a grading step; selecting a use nozzle that can participate in printing the substrate among the nozzles based on the grade determined at the grading step, which is a nozzle selecting step; and discharging the ink on the substrate using at least one nozzle among use nozzles, which is a printing step.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: November 5, 2024
    Assignee: SEMES CO., LTD.
    Inventors: Dong Hyun Jun, Woon Sang Baek, Sang Hyuk Yun, Keun Hwa Yang, Hyung Suk Lee, Cheol Hyung Cho
  • Publication number: 20240326921
    Abstract: A vehicle roof module includes a front support portion extending in the width direction of the vehicle and connecting the upper bodies of the vehicle with each other, a rear support portion extending in the width direction of the vehicle and provided at a rear of the front support portion, and a reinforcing support portion connecting the front support portion and the rear support portion in a longitudinal direction of the vehicle and including an internal pattern, in which the front support portion, the rear support portion, the reinforcing support portion, and the upper bodies of the vehicle are connected to each other to form a load path for a vehicle collision along the internal pattern of the reinforcing support portion.
    Type: Application
    Filed: November 7, 2023
    Publication date: October 3, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, HYUNDAI MOBIS CO., LTD.
    Inventors: Do Hoi KIM, Keon Chul LEE, Won Jung SONG, Suk Joo HONG, Sun Hyung CHO, Ju Chul KIM, Tae Ou PARK, Jang Ho KIM
  • Publication number: 20240304634
    Abstract: A light emitting display device according to an embodiment includes a display area that includes a plurality of pixel circuit portions, a plurality of light emitting diodes electrically connected to the plurality of pixel circuit portions, respectively, and a valley portion that is disposed in the display area, surrounds at least one of the plurality of pixel circuit portions to partition the plurality of pixel circuit portions into a plurality of regions, and includes at least one valley portion opening.
    Type: Application
    Filed: November 10, 2023
    Publication date: September 12, 2024
    Inventor: Jae Hyung CHO
  • Patent number: 12087392
    Abstract: Provided is a memory interface device. A memory interface device, comprising: a DQS input buffer configured to receive input data strobe signals and output a first intermediate data strobe signal, the DQS input buffer providing a static offset; an offset control circuit configured to receive the first intermediate data strobe signal and output a second intermediate data strobe signal; and a duty adjustment buffer configured to receive the second intermediate data strobe signal and output a clean data strobe signal, wherein the offset control circuit provides a dynamic offset using the clean data strobe signal.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: September 10, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Deuk Jeon, Min-Hyung Cho, Young-Su Kwon, Jin Ho Han
  • Publication number: 20240290263
    Abstract: A display device includes: a display area including a plurality of pixels; a peripheral area including a plurality of driving circuits that are disposed in a plurality of columns, the driving circuits driving the pixels; a plurality of pads including a first pad disposed in a pad area that receive a signal; and a first signal line that extends from the peripheral area in a column direction and is connected to the first pad of the pad area, wherein the first signal line includes a plurality of branches extending from the first signal line and connected to driving circuits of different columns.
    Type: Application
    Filed: January 2, 2024
    Publication date: August 29, 2024
    Inventors: Jae Hyung CHO, Min Kyu WOO
  • Patent number: D1065252
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: March 4, 2025
    Assignee: CITECH CO., LTD.
    Inventor: Sin-hyung Cho