Patents by Inventor Hyung Dong Kang

Hyung Dong Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8338221
    Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range betwe
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: December 25, 2012
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Chang Ho Lee, Hyung Dong Kang, Hyun Ho Lee, Yong Hyun Lee, Seon Myung Kim
  • Publication number: 20110061706
    Abstract: A thin film type solar cell with a plurality of unit cells connected in series is disclosed, wherein uniform energy conversion efficiency is maintained in all of the unit cells by improving the energy conversion efficiency in the unit cell with the relatively-low energy conversion efficiency, to thereby realize the improved energy conversion efficiency, the thin film type solar cell comprising the plurality of unit cells, each unit cell including a front electrode, a semiconductor layer, and a rear electrode sequentially deposited on a substrate, wherein the thin film type solar cell includes a first unit cell set including at least one first unit cell with a first cell width, and a second unit cell set including at least one second unit cell with a second cell width which is different from the first cell width, wherein the first unit cell set occupies 80 to 95% of an entire area of the unit cells, and the second unit cell set occupies 5 to 20% of the entire area of the unit cells.
    Type: Application
    Filed: November 15, 2009
    Publication date: March 17, 2011
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Chang Kyun PARK, Hyung Dong KANG
  • Patent number: 7736397
    Abstract: A method for manufacturing a capacitor embedded in a PCB includes: preparing a copper clad lamination (CCL) substrate having a reinforcement member and copper foils formed on both surfaces of the reinforcement member; planarizing surfaces of the copper foils of the CCL substrate; forming a dielectric layer on the planarized surface of the copper foils; and forming a top electrode on the dielectric layer.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: June 15, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Eun Lee, Yul Kyo Chung, Hyung Dong Kang, Hyun Ju Jin
  • Publication number: 20100136736
    Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range betwe
    Type: Application
    Filed: December 1, 2009
    Publication date: June 3, 2010
    Applicant: JUSUNG ENGINEERING CO., LTD.
    Inventors: Chang Ho LEE, Hyung Dong KANG, Hyun Ho LEE, Yong Hyun LEE, Seon Myung KIM
  • Publication number: 20100037947
    Abstract: A thin film type solar cell and a method for manufacturing the same is disclosed, the thin film type solar cell comprising a first electrode in a predetermined pattern on a substrate; a first semiconductor layer on the first electrode; a second electrode in a predetermined pattern on the first semiconductor layer; a second semiconductor layer on the second electrode; and a third electrode in a predetermined pattern on the second semiconductor layer, the first and third electrodes being electrically connected with each other, wherein a first solar cell is composed of a combination of the first electrode, the first semiconductor layer, and the second electrode; a second solar cell is composed of a combination of the second electrode, the second semiconductor layer, and the third electrode; and the first and second solar cells are connected in parallel, whereby it is possible to realize improved efficiency of the entire thin film type solar cell without performing a process for a current matching between the fir
    Type: Application
    Filed: August 7, 2009
    Publication date: February 18, 2010
    Inventors: Yong Hyun Lee, Hyung Dong Kang
  • Publication number: 20090205570
    Abstract: A gas supply unit and a chemical vapor deposition apparatus are disclosed. A gas supply unit for supplying a reactive gas for a chemical vapor deposition process can include a hot wire part configured to pyrolyze the reactive gas, an ejection part configured to eject the reactive gas towards the hot wire part, and a suction part disposed adjacent to the hot wire part and configured to suck in and exhaust a by-product of the reactive gas. With certain embodiments of the invention, the by-products resulting from the chemical vapor deposition process may be exhausted immediately, so that a thin film may be formed over an object with higher quality, and the cleaning cycles for the inside of the chamber may be extended, for greater productivity.
    Type: Application
    Filed: July 1, 2008
    Publication date: August 20, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Hyung-Dong Kang
  • Publication number: 20090117683
    Abstract: In accordance with the present invention, a method for manufacturing a single-crystal substrate comprising the steps of: preparing a square-shaped frame; pouring polycrystalline molten silicon into the prepared frame; cooling and crystallizing the molten silicon; and forming the single-crystal silicon substrate by transferring a heating element from one corner of the frame to another corner opposite the corner, thus simplifying the entire manufacturing process of the single-crystal substrate and reducing the material cost.
    Type: Application
    Filed: May 30, 2008
    Publication date: May 7, 2009
    Inventor: Hyung Dong Kang
  • Patent number: 7485411
    Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: February 3, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyung Mi Jung, Yul Kyo Chung, Hyung Dong Kang
  • Publication number: 20070234539
    Abstract: A method for manufacturing a capacitor embedded in a PCB includes: preparing a copper clad lamination (CCL) substrate having a reinforcement member and copper foils formed on both surfaces of the reinforcement member; planarizing surfaces of the copper foils of the CCL substrate; forming a dielectric layer on the planarized surface of the copper foils; and forming a top electrode on the dielectric layer.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 11, 2007
    Inventors: Seung Eun Lee, Yul Kyo Chung, Hyung Dong Kang, Hyun Ju Jin
  • Publication number: 20070215855
    Abstract: A wavelength-tunable light emitting device. A resilient support substrate is provided, and a light emitting diode is formed on an area of the support substrate. The light emitting diode includes a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer formed in their order. Pressure is applied to the active layer by bending the support substrate, thereby changing the energy band gap of the active layer.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 20, 2007
    Inventor: Hyung Dong Kang
  • Publication number: 20070178412
    Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 2, 2007
    Inventors: Hyung Mi Jung, Yul Kyo Chung, Hyung Dong Kang