Patents by Inventor Hyung Jik Byun

Hyung Jik Byun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080290513
    Abstract: Provided are a semiconductor package having molded balls on a bottom surface of a PCB and a method of manufacturing the semiconductor package. The semiconductor package includes: a semiconductor chip mounting member comprising circuit patterns on a first surface, an insulating layer defining openings exposing at least portions of the circuit patterns, and external contact terminals arranged on the portions of circuit patterns exposed by the openings; a semiconductor chip formed on a second surface of the semiconductor chip mounting member and electrically connected to the semiconductor chip mounting member; a first sealing portion coating the second surface of the semiconductor chip mounting member and the semiconductor chip; and a second sealing portion arranged on the insulating layer and the external contact terminals such that at least portions of the external contact terminals are exposed.
    Type: Application
    Filed: May 22, 2008
    Publication date: November 27, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-Jik BYUN, Jong-Gi LEE, Jong-Ho LEE, Se-Young YANG
  • Publication number: 20080088037
    Abstract: Provided are a semiconductor package and a method for manufacturing the same. The semiconductor package includes a semiconductor chip, a substrate attached to the semiconductor chip, a wire electrically connecting the semiconductor chip to the substrate, an external connection terminal electrically connecting the semiconductor chip to the outside, and an encapsulant formed of a plurality of insulators having different physical properties from each other, the encapsulant encapsulating the wire and surroundings of the wire. The method includes primarily encapsulating a window of the semiconductor package with an encapsulant having a low modulus and secondly encapsulating the window with an encapsulant having a high modulus.
    Type: Application
    Filed: September 19, 2007
    Publication date: April 17, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Jik Byun, So-Young Jung
  • Publication number: 20060131067
    Abstract: A method may involve providing a substrate body having an upper surface and a lower surface. Circuit layers may be provided on the upper and the lower surfaces of the substrate body. A prepreg layer may be provided on the upper surface of the substrate body. The prepreg layer may cover the circuit layer on the upper surface. A PCB may be manufactured according to the method. The PCB may be implemented in a semiconductor package.
    Type: Application
    Filed: June 7, 2005
    Publication date: June 22, 2006
    Inventors: Hyung-Jik Byun, Yun-Chong Lee
  • Patent number: 7023096
    Abstract: A multi-chip package includes a substrate with a chip mounting area and a first chip positioned in the mounting area. A spacer is attached to the active surface of the first chip and has a thickness to allow space for wire-bonding the first chip's active surface to the substrate. A second chip is attached to the spacer over the first chip. Conductive metal wires electrically connect the first and second chips to the substrate. A package body is formed by encapsulating the first and second chips and the conductive metal wires. Ends of the spacer extend to the edge the package body. External connection terminals are attached to the bottom surface of the substrate and a method for the manufacturing thereof.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: April 4, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu Jin Lee, Hyung Jik Byun
  • Patent number: 6736306
    Abstract: A semiconductor chip package includes a semiconductor chip mounted on a top surface of a substrate. A bottom surface of the substrate has ball pads. Bonding pads of the chip are electrically connected to the substrate. Enhanced pads, each having one or more dummy patterns coupled to one or more dummy pads, are preferably formed near edges of the substrate. The semiconductor chip package is mounted on the board by attaching external connection terminals such as solder balls, formed on the ball pads and the dummy pads, to a solder paste coated on ball lands and enhanced lands of the board.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: May 18, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Jik Byun, Kyu-Jin Lee
  • Publication number: 20030062628
    Abstract: A multi-chip package includes a substrate with a chip mounting area and a first chip positioned in the mounting area. A spacer is attached to the active surface of the first chip and has a thickness to allow space for wire-bonding the first chip's active surface to the substrate. A second chip is attached to the spacer over the first chip. Conductive metal wires electrically connect the first and second chips to the substrate. A package body is formed by encapsulating the first and second chips and the conductive metal wires. Ends of the spacer extend to the edge the package body. External connection terminals are attached to the bottom surface of the substrate and a method for the manufacturing thereof.
    Type: Application
    Filed: September 12, 2002
    Publication date: April 3, 2003
    Inventors: Kyu Jin Lee, Hyung Jik Byun
  • Publication number: 20030025190
    Abstract: A tape ball grid array (TBGA) package having improved thermal reliability includes a semiconductor chip mounted on a tape circuit board having a base film, ball land pads, and board junction pads, wherein the semiconductor chip is attached to a first surface of the base film, the ball land pads are formed on an opposite, second surface of the base film, and the board junction pads are formed on either side of the base film. Each one of the board junction pads is electrically connected to a corresponding ball land pad using routings and/or via holes and to an associated chip pad by a bonding wire. A package body is formed by encapsulating the assembly, and external contact terminals, each one being attached to one of the ball land pads.
    Type: Application
    Filed: July 2, 2002
    Publication date: February 6, 2003
    Inventors: Hyung Jik Byun, Jin Ho Kim
  • Publication number: 20020104874
    Abstract: A semiconductor chip package includes a semiconductor chip mounted on a top surface of a substrate. A bottom surface of the substrate has ball pads. Bonding pads of the chip are electrically connected to the substrate. Enhanced pads, each having one or more dummy patterns coupled to one or more dummy pads, are preferably formed near edges of the substrate. The semiconductor chip package is mounted on the board by attaching external connection terminals such as solder balls, formed on the ball pads and the dummy pads, to a solder paste coated on ball lands and enhanced lands of the board.
    Type: Application
    Filed: January 16, 2002
    Publication date: August 8, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Jik Byun, Kyu-Jin Lee