Patents by Inventor Hyung-Jong Ko

Hyung-Jong Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160325107
    Abstract: A wearable patch-type automatic defibrillator attachable to a region of a patient near the patient's heart includes a battery which stores electrical energy for defibrillation, a controller which controls the battery, electrocardiogram (ECG) electrodes, and defibrillation electrodes. The controller analyzes ECG signals of the patient received through the ECG electrodes, and automatically provides the patient with the electrical energy stored in the battery through the defibrillation electrodes when defibrillation is needed according to a result of the analysis.
    Type: Application
    Filed: March 31, 2016
    Publication date: November 10, 2016
    Inventors: SANG WOOK PARK, HYUNG JONG KO, YONG IN PARK, SEOUNG JAE YOO, YUN CHEOL HAN
  • Patent number: 9281704
    Abstract: A method of controlling a load current is provided. By the method, a battery voltage control operation is begun when a battery voltage becomes lower than a first threshold value, whether a gradient of the battery voltage is a positive gradient or a negative gradient is determined at an interval of a reference or, alternatively, predetermined control time, the load current is controlled based on the gradient of the battery voltage at an interval of the reference or, alternatively, predetermined control time, and the battery voltage control operation is finished when the battery voltage becomes higher than a second threshold value.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: March 8, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Hun Heo, Sang-Hyun Cho, Hyung-Jong Ko
  • Publication number: 20160027986
    Abstract: A thermoelectric element is provided as follows. First and second semiconductor fin structures are disposed on a semiconductor substrate. Each semiconductor fin structure extends in a first direction, protruding from the semiconductor substrate. First and second semiconductor nanowires are disposed on the first and second semiconductor fin structures, respectively. The first semiconductor nanowires include first impurities. The second semiconductor nanowires include second impurities different from the first impurities. A first electrode is connected to first ends of the first and second semiconductor nanowires. A second electrode is connected to second ends of the first semiconductor nanowires. A third electrode is connected to second ends of the second semiconductor nanowires.
    Type: Application
    Filed: June 16, 2015
    Publication date: January 28, 2016
    Inventors: KWANG-HO KIM, Jun-Hyeok YANG, Hyung-Jong KO, Se-Ki KIM, Ho-Jin PARK, Se-Ra AN
  • Publication number: 20150170992
    Abstract: A semiconductor chip includes a semiconductor circuit layer and a semiconductor thermoelectric layer disposed on a substrate. The circuit layer includes a first circuit and a second circuit disposed horizontally in a first direction. The thermoelectric layer includes a first on-die thermoelectric element, where the thermoelectric layer is disposed on the circuit layer including the first circuit and the second circuit. The first on-die thermoelectric element is configured to distribute heat generated at the first circuit horizontally in the first direction toward the second circuit.
    Type: Application
    Filed: December 10, 2014
    Publication date: June 18, 2015
    Inventors: Jun-Hyeok Yang, Se-Ki Kim, Se-Ra An, Hyung-Jong Ko
  • Publication number: 20150063420
    Abstract: A temperature sensor, a processor including the same, and a method of operating the same are provided.
    Type: Application
    Filed: September 2, 2014
    Publication date: March 5, 2015
    Inventors: Sang Hyun CHO, Hyung Jong KO, Kyung Soo PARK, Seoung Jae YOO, Sang Ho KIM, Ho Jin PARK
  • Publication number: 20140047248
    Abstract: A method of controlling a load current is provided. By the method, a battery voltage control operation is begun when a battery voltage becomes lower than a first threshold value, whether a gradient of the battery voltage is a positive gradient or a negative gradient is determined at an interval of a reference or, alternatively, predetermined control time, the load current is controlled based on the gradient of the battery voltage at an interval of the reference or, alternatively, predetermined control time, and the battery voltage control operation is finished when the battery voltage becomes higher than a second threshold value.
    Type: Application
    Filed: August 5, 2013
    Publication date: February 13, 2014
    Inventors: Dong-Hun HEO, Sang-Hyun CHO, Hyung-Jong KO
  • Patent number: 7733950
    Abstract: Equalizers and methods of equalizing, wherein an equalizer may include includes n (where n is an integer ?) biquad circuits each include an input node, a biquad band pass node and a biquad low pass node, a first summing circuit summing an output of the biquad band pass node of the nth biquad circuit and an output of the biquad low pass node of the nth biquad circuit, a second summing circuit subtracting the output of the biquad low pass node of the (n?1)th biquad circuit from the output of the first summing circuit and amplifying the summed result by a constant, and a third summing circuit summing an output of the second summing circuit and the output of the biquad low pass node of the nth biquad circuit, wherein the n biquad circuits are Gm-C biquad circuits each having transconductors connected in a self-feedback configuration to the biquad band pass node of the corresponding n biquad circuit. The equalizer may increase a filter bandwidth and/or maintain a specific boosting gain while reducing circuit size.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: June 8, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-Jong Ko
  • Publication number: 20060140263
    Abstract: Equalizers and methods of equalizing, wherein an equalizer may include includes n (where n is an integer ?) biquad circuits each include an input node, a biquad band pass node and a biquad low pass node, a first summing circuit summing an output of the biquad band pass node of the nth biquad circuit and an output of the biquad low pass node of the nth biquad circuit, a second summing circuit subtracting the output of the biquad low pass node of the (n-1)th biquad circuit from the output of the first summing circuit and amplifying the summed result by a constant, and a third summing circuit summing an output of the second summing circuit and the output of the biquad low pass node of the nth biquad circuit, wherein the n biquad circuits are Gm-C biquad circuits each having transconductors connected in a self-feedback configuration to the biquad band pass node of the corresponding n biquad circuit. The equalizer may increase a filter bandwidth and/or maintain a specific boosting gain while reducing circuit size.
    Type: Application
    Filed: December 28, 2005
    Publication date: June 29, 2006
    Inventor: Hyung-Jong Ko