Abstract: Disclosed herein are methods of treating acute kidney injury. The method can include administering a sufficient amount of a DNA origami nanostructure to a subject afflicted with AKI to increase an excretory function of said subject. In some examples, the the DNA origami nanostructure includes a scaffold strand and a plurality of staple strands, in which the scaffold strand comprises a M13 viral genome having a length of 7249 base pairs; and each staple strand of the plurality of staple strands has a length of about 20 to 60 base pairs.

Abstract: Disclosed herein are methods of treating acute kidney injury. The A method can include administering a sufficient amount of a DNA origami nanostructure to a subject afflicted with AKI to increase an excretory function of said subject. In some examples, the DNA origami nanostructure includes a scaffold strand and a plurality of staple strands, in which the scaffold strand comprises a M1 3 viral genome having a length of 7249 base pairs; and each staple strand of the plurality of staple strands has a length of about 20 to 60 base pairs.

Abstract: Disclosed herein are methods of treating acute kidney injury. The A method can include administering a sufficient amount of a DNA origami nanostructure to a subject afflicted with AKI to increase an excretory function of said subject. In some examples, the DNA origami nanostructure includes a scaffold strand and a plurality of staple strands, in which the scaffold strand comprises a M1 3 viral genome having a length of 7249 base pairs; and each staple strand of the plurality of staple strands has a length of about 20 to 60 base pairs.

Abstract: Apparatus and method for dispatching a very long instruction word (VLIW) instruction having a variable length are provided. The apparatus for dispatching a VLIW instruction includes a packet buffer for storing at least one or more VLIW instructions, and a decoding unit configured to constitute a VLIW instruction to be currently executed among the VLIW instructions stored in the packet buffer and decode predetermined bits of each sub-instruction contained in the VLIW instruction. The apparatus dispatches a corresponding sub-instruction to an FU which corresponds to each sub-instruction, based on the results of decoding performed in the decoding unit, position information on the sub-instructions that are placed on the packet buffer, and position information on the sub-instructions that are placed in the current VLIW instruction. Sub-instructions can be effectively dispatched to corresponding FUs using simple decoding logic even in a case where the length of the VLIW instruction is not fixed.

Abstract: In the scanning conversion apparatus, a first converter converts input interlaced scan data into progressive scan data, and a second converter converting the progressive scan data output from the first converter to interlaced scan data.

Abstract: In the scanning conversion apparatus, a first converter converts input interlaced scan data into progressive scan data, and a second converter converting the progressive scan data output from the first converter to interlaced scan data.

Abstract: Apparatus and method for dispatching a very long instruction word (VLIW) instruction having a variable length are provided. The apparatus for dispatching a VLIW instruction includes a packet buffer for storing at least one or more VLIW instructions, and a decoding unit configured to constitute a VLIW instruction to be currently executed among the VLIW instructions stored in the packet buffer and decode predetermined bits of each sub-instruction contained in the VLIW instruction. The apparatus dispatches a corresponding sub-instruction to an FU which corresponds to each sub-instruction, based on the results of decoding performed in the decoding unit, position information on the sub-instructions that are placed on the packet buffer, and position information on the sub-instructions that are placed in the current VLIW instruction. Sub-instructions can be effectively dispatched to corresponding FUs using simple decoding logic even in a case where the length of the VLIW instruction is not fixed.