Abstract: The present disclosure relates to a memory device and a manufacturing method of the memory device. The memory device according to an embodiment includes a stacked structure including gate lines separated from and stacked on top of each other, a main plug formed in a vertical direction to the stacked structure, a plug separation pattern separating the main plug into first and second sub-plugs, a gap formed in the plug separation pattern; and a separation layer surrounding the gap.

Abstract: There are provided a semiconductor device and a manufacturing method of a semiconductor device. The semiconductor device includes: a gate structure including conductive layers and insulating layers, which are alternately stacked; channel structures penetrating the gate structure, the channel structures being arranged in a first direction; and a cutting structure extending in the first direction, the cutting structure consecutively penetrating the channel structures. Each of the channel structures includes a first channel structure and a second channel structure, which are isolated from each other by the cutting structure.

Abstract: Provided is a semiconductor memory device including a vertical electrode provided on a substrate and a blocking insulating layer provided on a sidewall of the vertical electrode. A plurality of active patterns are provided spaced apart from the vertical electrode by the blocking insulating layer, and memory patterns are provided between the active patterns.