Patents by Inventor Hyung Koun Cho

Hyung Koun Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230118661
    Abstract: A vertical field effect transistor according to an embodiment of the present invention does not require a spacer and, accordingly, remarkably alleviates the problem that electric charge is scattered at an interface, thereby having excellent electrical characteristics. The vertical field effect transistor includes a substrate, a source electrode positioned on the substrate, an active layer positioned on the source electrode and having vertically grown crystal grains, a drain electrode positioned on the active layer to be spaced by the active layer away from the source electrode, a gate insulating layer positioned on a lateral surface of the active layer, and a gate electrode positioned on the gate insulating layer.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 20, 2023
    Inventors: Hyung Koun CHO, Sung Hyeon JUNG, Young Been KIM, Dong Su KIM, Ji Sook YANG
  • Publication number: 20230097791
    Abstract: An embodiment of the present disclosure provides a resistive switching memory device including: a lower electrode; an amorphous metal oxide-based first active layer positioned on the lower electrode; an amorphous metal oxide-based second active layer positioned on the first active layer; and an upper electrode positioned on the second active layer, wherein the first active layer and the second active layer are made of the same substance but are different in electrical characteristic, thereby having a voluntary compliance current characteristic and a voluntary current rectification characteristic as a single device having a stable electrical characteristic, a method of manufacturing the resistive switching memory device, and an array including the resistive switching memory device.
    Type: Application
    Filed: September 29, 2022
    Publication date: March 30, 2023
    Inventors: Hyung Koun CHO, Dong Su KIM, Hee Won SUH
  • Publication number: 20210222305
    Abstract: The present disclosure relates to an energy transferring type photoelectrode including a substrate; a photoactive layer formed on the substrate; and a catalyst layer formed on the photoactive layer, in which an emission spectrum region of the photoactive layer and an absorption spectrum region of the catalyst layer overlap.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 22, 2021
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Hyung Koun CHO, Cheol Hyoun AHN, Nishad Gopal DESHPANDE
  • Publication number: 20150001467
    Abstract: Disclosed herein is a semiconductor device, including: a substrate; and a superlattice thin film formed on the substrate, wherein the superlattice thin film is configured such that insulator layers and semiconductor layers are alternately laminated on the substrate. The superlattice thin film is characterized in that, since it is formed by the lamination of a semiconductor layer and an insulator layer, the semiconductor layer and insulator layer constituting the superlattice thin film may be composed of a crystalline material, an amorphous material or a mixture thereof, and thus various kinds of materials for solving the mismatch in lattice constant between conventional superlattices made of different kinds of semiconductor materials can be used without limitations.
    Type: Application
    Filed: June 17, 2014
    Publication date: January 1, 2015
    Inventors: Hyung Koun CHO, Cheol Hyoun AHN
  • Patent number: 8202761
    Abstract: Disclosed herein is a manufacturing method of metal oxide nanostructure, including the steps of: (S1) supplying a precursor containing a first metal, a precursor containing a second metal and oxygen onto a substrate; (S2) forming an amorphous second metal oxide layer on the substrate; (S3) forming first nuclei containing the first metal as a main component and second nuclei containing the second metal as a main component on the substrate; (S4) converting the first nuclei into single crystalline seed layers spaced apart from each other and converting the second nuclei into amorphous layers surrounding the first nuclei; and (S5) selectively forming rods on the seed layers and then growing the rods.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: June 19, 2012
    Assignee: Sungkyunkwan University Foundation for Corporate Collaboration
    Inventors: Hyung Koun Cho, Dong Chan Kim
  • Publication number: 20110049467
    Abstract: Disclosed herein is a manufacturing method of metal oxide nanostructure, including the steps of: (S1) supplying a precursor containing a first metal, a precursor containing a second metal and oxygen onto a substrate; (S2) forming an amorphous second metal oxide layer on the substrate; (S3) forming first nuclei containing the first metal as a main component and second nuclei containing the second metal as a main component on the substrate; (S4) converting the first nuclei into single crystalline seed layers spaced apart from each other and converting the second nuclei into amorphous layers surrounding the first nuclei; and (S5) selectively forming rods on the seed layers and then growing the rods.
    Type: Application
    Filed: August 25, 2010
    Publication date: March 3, 2011
    Applicant: SUNGYUNKWAN UNIVERSITY FOUNDATION FOR CORPORATE COLLABORATION
    Inventors: Hyung Koun Cho, Dong Chan Kim