Abstract: A pouch film laminate according to the present disclosure may include a base material layer, a gas barrier layer, and a sealant layer. The gas barrier layer may be disposed between the base material layer and the sealant layer. The gas barrier layer may include stainless steel. The pouch film laminate may have a tensile rupture strength of about 130% to about 250% of a tensile rupture strength of the gas barrier layer.

Abstract: Disclosed is a battery cell, which includes a battery case having an accommodation portion in which an electrode assembly is mounted, and a sealing portion formed by sealing an outer periphery thereof; an electrode lead electrically connected to an electrode tab included in the electrode assembly and protruding out of the battery case via the sealing portion; and a lead film located at a portion corresponding to the sealing portion in at least one of an upper portion and a lower portion of the electrode lead, wherein a gas discharge guiding unit is inserted in the lead film, the battery case includes a cover portion extending from the sealing portion, and the cover portion is located on the lead film and protrudes in an outer direction of the battery case.

Abstract: A method of manufacturing a multilayer metal plate by electroplating includes a first forming operation of forming one of a first metal layer and a second metal layer on a substrate by electroplating, wherein the second metal layer is less recrystallized than the first metal layer, the second metal layer is comprised of nanometer-size grains, and the second metal layer has a higher level of tensile strength than the first metal layer; and a second forming operation of forming, by electroplating, a third metal layer not formed in the first forming operation on a surface of one of the first metal layer and the second metal layer formed in the first forming operation.

Abstract: The present disclosure relates to a secondary battery comprising an electrode assembly having an electrode lead attached thereto, a case comprising a receiving portion in which the electrode assembly is received and a sealing portion comprising a sealant resin and configured to seal the electrode assembly, a lead film configured to cover a portion of an outer surface of the electrode lead and interposed between the electrode lead and the case, a vent area disposed in at least a portion of the case, and a vent member comprising a first layer comprising a resin having lower melting point than the sealant resin, and a second layer disposed on at least one surface of the first layer and comprising an adhesive material. The vent member may be inserted into the vent area. A thickness of the second layer may be equal to or smaller than 5 ?m.

Abstract: A secondary battery includes: an electrode assembly including electrode sheets and a separator interposed between the electrode sheets; a pouch-like battery casing in which the electrode assembly is received; an electrode lead connected to the electrode assembly and protruding out from the battery casing; and a lead film covering the electrode lead and interposed between the electrode lead and the battery casing, wherein the lead film includes an outer layer covering the electrode lead and an inner layer disposed inside of the outer layer, and the inner layer includes a material having a higher air permeability as compared to the outer layer.

Abstract: A method and an apparatus for fingerprint recognition are disclosed. The apparatus for the fingerprint recognition may extract a plurality of fingerprint feature points from a fingerprint image and may predetermine a group among the plurality of fingerprint feature points. The apparatus for the fingerprint recognition may also calculate a ridge number between the first fingerprint feature points included in the group and may use the ridge number to generate a ridge count sequence.

Abstract: A method and an apparatus for fingerprint recognition are disclosed. The apparatus for the fingerprint recognition may extract a plurality of fingerprint feature points from a fingerprint image and may configure a group among the plurality of fingerprint feature points. The apparatus for the fingerprint recognition may also calculate a distance value between first fingerprint feature points included in the group and may use the distance value to generate a distance value sequence.

Abstract: A method and an apparatus for fingerprint recognition are disclosed. The apparatus for the fingerprint recognition may extract a plurality of fingerprint feature points from a fingerprint image and may predetermine a group among the plurality of fingerprint feature points. The apparatus for the fingerprint recognition may also calculate a ridge number between the first fingerprint feature points included in the group and may use the ridge number to generate a ridge count sequence.

Abstract: A method for fabricating a semiconductor device includes: forming isolation layers and active regions in a substrate, wherein each of the active regions is formed between the isolation layers; forming a silicide layer in each of the active regions; forming trenches and silicide layer patterns simultaneously by etching the silicide layer and each of the active regions, wherein each of the trenches is located between the silicide layer patterns; forming a buried gate in each of the trenches; forming an inter-layer dielectric layer that covers the buried gate and the silicide layer patterns; and forming a first opening that exposes one silicide layer pattern among the silicide layer patterns by selectively etching the inter-layer dielectric layer, wherein the silicide layer patterns are formed before the buried gate is formed.

Abstract: A semiconductor device includes a first isolation layer formed in a trench in a substrate. The isolation layer includes a first oxide layer formed in the trench and a second oxide layer formed over the first oxide layer, wherein the first oxide layer and the second oxide layer have a same composition.

Abstract: A method for fabricating a semiconductor device includes forming a buried gate electrode in a semiconductor substrate. An insulating layer is formed over the buried gate electrode and is etched to form a contact hole exposing the semiconductor substrate. A sacrificial spacer is formed on sidewalls of the insulating layer defining the contact hole. A polysilicon layer pattern is formed in the contact hole. The sacrificial spacer is removed to form an air gap around the polysilicon layer pattern. A thermal process is performed to remove a seam existing in the polysilicon layer pattern.

Abstract: A method for fabricating a semiconductor device includes forming a buried gate electrode in a semiconductor substrate. An insulating layer is formed over the buried gate electrode and is etched to form a contact hole exposing the semiconductor substrate. A sacrificial spacer is formed on sidewalls of the insulating layer defining the contact hole. A polysilicon layer pattern is formed in the contact hole. The sacrificial spacer is removed to form an air gap around the polysilicon layer pattern. A thermal process is performed to remove a seam existing in the polysilicon layer pattern.

Abstract: A method for fabricating a semiconductor device includes forming a buried gate electrode in a semiconductor substrate. An insulating layer is formed over the buried gate electrode and is etched to form a contact hole exposing the semiconductor substrate. A sacrificial spacer is formed on sidewalls of the insulating layer defining the contact hole. A polysilicon layer pattern is formed in the contact hole. The sacrificial spacer is removed to form an air gap around the polysilicon layer pattern. A thermal process is performed to remove a seam existing in the polysilicon layer pattern.

Abstract: A semiconductor device includes a first isolation layer formed in a trench in a substrate. The isolation layer includes a first oxide layer formed in the trench and a second oxide layer formed over the first oxide layer, wherein the first oxide layer and the second oxide layer have a same composition.

Abstract: A semiconductor device includes a substrate including an active region, an insulation layer formed over the substrate, a plurality of openings formed in the insulation layer, a plurality of contact plugs filling the plurality of openings, a silicide layer formed over the substrate and between the substrate and each contact plug of the contact plugs in order to cover a bottom of each contact plug. The semiconductor device may decrease contact resistance by forming a silicide layer before the formation of openings regardless of the linewidth and aspect ratio of the openings. Also, because it does not have to consider step coverage based on the aspect ratio of openings, there is no limitation in the method of depositing a metal layer. Therefore, productivity may be improved.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial spacers, forming conductive capping layers capping the first plugs and the air gaps, and forming second plugs over the conductive capping layers.

Abstract: A semiconductor device includes a first isolation layer formed in a trench in a substrate. The isolation layer includes a first oxide layer formed in the trench and a second oxide layer formed over the first oxide layer, wherein the first oxide layer and the second oxide layer have a same composition.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial spacers, forming conductive capping layers capping the first plugs and the air gaps, and forming second plugs over the conductive capping layers.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial spacers, forming conductive capping layers capping the first plugs and the air gaps, and forming second plugs over the conductive capping layers.

Abstract: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming contact holes between the bit line structures, forming sacrificial spacers on sidewalls of the contact holes, forming first plugs recessed inside the contact holes, forming air gaps by removing the sacrificial spacers, forming conductive capping layers capping the first plugs and the air gaps, and forming second plugs over the conductive capping layers.