Patents by Inventor Hyung Mi Jung

Hyung Mi Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090310323
    Abstract: The present invention relates to a printed circuit board including an electronic component embedded therein and a method of manufacturing the board, which electrically connect electrode terminals of the electronic component to the internal circuit layers using connecting parts, thus the circuit density is dispersed
    Type: Application
    Filed: August 15, 2008
    Publication date: December 17, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Jin Baek, Yul Kyo Chung, Hyung Mi Jung, Jung Soo Byun
  • Publication number: 20090057860
    Abstract: Disclosed is a semiconductor memory package having a thin-film decoupling capacitor that reduces radio frequency noise. The semiconductor memory package in accordance with an embodiment of the present invention includes a substrate, a memory chip being mounted on one side of the substrate and a decoupling capacitor formed in the vicinity one the side of the substrate where the memory chip is mounted.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Bae, Yul-Kyo Chung, Sung-Taek Lim, Hyung-Mi Jung, Yee-Na Shin, Seung-Hyun Sohn, Jin-Seok Moon
  • Patent number: 7485411
    Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: February 3, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyung Mi Jung, Yul Kyo Chung, Hyung Dong Kang
  • Patent number: 7480980
    Abstract: A planar magnetic inductor and a method for manufacturing the same are provided. The planar magnetic inductor comprises an insulating oxide magnetic layer formed on a substrate, a conductive coil separated from a lower surface of the insulating oxide magnetic layer while being completely embedded in the insulating oxide magnetic layer, and a cover layer formed on the insulating oxide magnetic layer for protecting the insulating oxide magnetic layer. The insulating oxide magnetic layer comprises a lower insulating oxide magnetic layer, and an upper insulating oxide magnetic layer formed on the lower insulating oxide magnetic layer, such that the conductive coil is completely embedded in the upper insulating oxide magnetic layer. The planar magnetic inductor can realize excellent high frequency characteristics and high inductance with a reduced scale.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: January 27, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyung Mi Jung, Jin Seok Moon, Seok Bae, Mano Yasuhiko
  • Publication number: 20080100986
    Abstract: Provided is a method of manufacturing a capacitor embedded printed circuit board. In the method, a laminated body is prepared, including a laminated plate having first and second copper films on both sides thereof, where at least one bottom electrode is provided on at least one side. A dielectric layer is formed on the at least one bottom electrode. A metal layer is formed on a top surface of the dielectric layer where a capacitor is to be formed. A conductive paste layer is formed on at least one region of a top surface of the metal layer, where the conductive paste layer and the metal layer is provided as a top electrode. An insulation resin layers are formed on both sides of the laminated plate, respectively. A conductive via is formed in the insulation resin layer such that it is connected to the conductive paste layer.
    Type: Application
    Filed: October 15, 2007
    Publication date: May 1, 2008
    Inventors: Seung Hyun Sohn, Yul Kyo Chung, Sung Taek Lim, Hyung Mi Jung
  • Publication number: 20070178412
    Abstract: In a method for manufacturing a printed circuit board with a thin film capacitor embedded therein, a conductive metal is sputtered via a first mask to form a lower electrode. A dielectric material is sputtered via a second mask to form a dielectric layer. The conductive metal is sputtered via a third mask to form an upper electrode. An insulating layer is stacked on a stack body with the upper electrode formed therein and via holes are perforated from a top surface of the insulating layer to a top surface of the lower electrode and from the top surface of the insulating layer to a top surface of the upper electrode formed on the substrate. Also, the stack body with the via holes formed therein is electrolytically and electrolessly plated.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 2, 2007
    Inventors: Hyung Mi Jung, Yul Kyo Chung, Hyung Dong Kang