Patents by Inventor Hyung Min Yoon
Hyung Min Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250062474Abstract: A battery container has improved energy density and can be used in an energy storage system. The battery container includes a container body, a coupling unit configured to couple different container bodies, and a load support unit configured to support a vertical load of the container body.Type: ApplicationFiled: November 4, 2024Publication date: February 20, 2025Applicant: LG ENERGY SOLUTION, LTD.Inventors: Yo-Hwan KIM, Ji-Hun KIM, Hong-Jae PARK, Mun-Seok YANG, Sung-Han YOON, Seung-Jun LEE, Ji-Won LEE, Hyun-Min LEE, Hyung-Uk LEE, Tae-Shin CHO
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Patent number: 12219699Abstract: A flexible circuit board comprises a substrate on which a chip mounting area is defined, a circuit pattern disposed on the substrate, and a protective layer on the circuit pattern, and the circuit pattern includes a plurality of first circuit patterns, a plurality of second circuit patterns, and a plurality of dummy patterns, and the first circuit pattern includes a first pad part, a second pad part, and a first wiring part connected to the first pad part and the second pad part, and the second circuit pattern includes a third pad part, a fourth pad part, and a second wiring part connected to the third pad part and the fourth pad part, and a through hole is disposed in an inner region of the first circuit pattern.Type: GrantFiled: January 9, 2023Date of Patent: February 4, 2025Assignee: LG INNOTEK CO., LTD.Inventors: Seung Soo Cho, Hyung Kyu Yoon, Sung Min Chae
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Publication number: 20250030141Abstract: An energy storage system according to the present disclosure includes at least one battery rack including a plurality of stacked battery modules; a container accommodating the at least one battery rack, wherein the container includes a bottom plate in which the at least one battery rack is disposed; and a fire fighting water collection chamber disposed lower than the bottom plate and having at least one side in communication with the bottom plate to allow a fire fighting water dropped from the at least one battery rack to enter.Type: ApplicationFiled: April 27, 2023Publication date: January 23, 2025Applicant: LG ENERGY SOLUTION, LTD.Inventors: Ji-Hun KIM, Yo-Hwan KIM, Hong-Jae PARK, Mun-Seok YANG, Sung-Han YOON, Seung-Jun LEE, Ji-Won LEE, Hyun-Min LEE, Hyung-Uk LEE, Tae-Shin CHO
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Publication number: 20250023216Abstract: A battery rack according to the present disclosure includes a plurality of battery modules; a rack case having receiving portions, each receiving portion configured to and receive one of the plurality of battery modules at each predetermined height, and each receiving portion having a structure in which upper and lower sides and left and right sides are closed and front and rear sides are open; a fire fighting water supply pipe connected to each of the battery modules disposed in the receiving portions which supplies a fire fighting water when a fire occurs; and a drain guide disposed on an outer surface of the rack case including at least one surface of a front outer surface or a rear outer surface of the rack case, the drain guide being configured to guide drainage of the fire fighting water.Type: ApplicationFiled: April 27, 2023Publication date: January 16, 2025Applicant: LG ENERGY SOLUTION, LTD.Inventors: Ji-Hun KIM, Yo-Hwan KIM, Hong-Jae PARK, Mun-Seok YANG, Sung-Han YOON, Seung-Jun LEE, Ji-Won LEE, Hyun-Min LEE, Hyung-Uk LEE, Tae-Shin CHO
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Publication number: 20230169713Abstract: There is provided a multichip ray tracing device. The multichip ray tracing device includes a plurality of memory units; an acceleration structure division processing unit that divides an acceleration structure (AS) into a plurality of divided acceleration structures and stores each of the plurality of divided acceleration structures in a corresponding memory unit among the plurality of memory units; and a plurality of ray tracing core units connected to the plurality of memory units. Each of the plurality of ray tracing core units performs an internal ray tracing (Internal RT) operation for a corresponding divided acceleration structure and transmits corresponding ray information to a corresponding ray tracing core unit to perform an external ray tracing (External RT) operation when attempting to access a data node that is not in the corresponding divided acceleration structure in the process of the internal ray tracing operation.Type: ApplicationFiled: November 28, 2022Publication date: June 1, 2023Applicant: Siliconarts, INC.Inventors: Hyung Min YOON, Byoung Ok LEE, Hyuck Joo KWON
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Patent number: 10902666Abstract: Disclosed is a buffering method in a portable ray tracing system. The buffering method includes: receiving a dynamic acceleration structure from the portable ray tracing apparatus during the process for performing a graphics process; packaging a dynamic object updated by the user terminal with the dynamic acceleration structure and sequentially storing the packaged dynamic object into a buffer area formed in a system memory of the user terminal; when disconnection of the physical connection is detected, performing ray tracing using a graphics processor of the user terminal by loading packaging data from the buffer area and determining a recovery point.Type: GrantFiled: May 31, 2019Date of Patent: January 26, 2021Assignee: SILICONARTS, INC.Inventor: Hyung Min Yoon
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Patent number: 10846909Abstract: Disclosed is a portable ray tracing apparatus. The apparatus includes: a physical connection unit providing a physical connection to a connection port of a user terminal; a graphic data area detecting unit detecting a graphic data area which is allocated to a system memory of the user terminal if the physical connection is provided and which employs an acceleration structure for graphics processes agreed upon in advance; and a graphic processor operating unit synchronizing the graphic data area with an internal memory and operating a graphic processor of the user terminal. Therefore, the present invention performs ray tracing by being physically connected to a computing device and thereby shares graphics processing.Type: GrantFiled: May 31, 2019Date of Patent: November 24, 2020Assignee: SILICONARTS, INC.Inventor: Hyung Min Yoon
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Patent number: 10846908Abstract: Disclosed is a graphics processing apparatus based on hybrid GPU architecture. The graphics processing apparatus includes: an acceleration structure generation unit generating an acceleration structure based on geometry data related to a 3D scene; a ray tracing unit performing ray tracing based on the acceleration structure; and a rasterization unit including a sharing interface for shader-sharing with the ray tracing unit and performing rasterization rendering by sharing shading information generated from a result of the ray tracing.Type: GrantFiled: May 31, 2019Date of Patent: November 24, 2020Assignee: SILICONARTS, INC.Inventor: Hyung Min Yoon
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Publication number: 20200327716Abstract: Disclosed is a portable ray tracing apparatus. The apparatus includes: a physical connection unit providing a physical connection to a connection port of a user terminal; a graphic data area detecting unit detecting a graphic data area which is allocated to a system memory of the user terminal if the physical connection is provided and which employs an acceleration structure for graphics processes agreed upon in advance; and a graphic processor operating unit synchronizing the graphic data area with an internal memory and operating a graphic processor of the user terminal. Therefore, the present invention performs ray tracing by being physically connected to a computing device and thereby shares graphics processing.Type: ApplicationFiled: May 31, 2019Publication date: October 15, 2020Applicant: SILICONARTS, INC.Inventor: Hyung Min YOON
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Publication number: 20200327712Abstract: Disclosed is a graphics processing apparatus based on hybrid GPU architecture. The graphics processing apparatus includes: an acceleration structure generation unit generating an acceleration structure based on geometry data related to a 3D scene; a ray tracing unit performing ray tracing based on the acceleration structure; and a rasterization unit including a sharing interface for shader-sharing with the ray tracing unit and performing rasterization rendering by sharing shading information generated from a result of the ray tracing.Type: ApplicationFiled: May 31, 2019Publication date: October 15, 2020Applicant: SILICONARTS, INC.Inventor: Hyung Min YOON
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Publication number: 20200327717Abstract: Disclosed is a buffering method in a portable ray tracing system. The buffering method includes: receiving a dynamic acceleration structure from the portable ray tracing apparatus during the process for performing a graphics process; packaging a dynamic object updated by the user terminal with the dynamic acceleration structure and sequentially storing the packaged dynamic object into a buffer area formed in a system memory of the user terminal; when disconnection of the physical connection is detected, performing ray tracing using a graphics processor of the user terminal by loading packaging data from the buffer area and determining a recovery point.Type: ApplicationFiled: May 31, 2019Publication date: October 15, 2020Applicant: SILICONARTS, INC.Inventor: Hyung Min YOON
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Patent number: 10769750Abstract: Disclosed is a ray tracing device using MIMD based T&I scheduling, including: a ray receiving unit receiving a ray generated with respect to a specific frame according to a frame progress order and storing the received ray in a ray buffer; a ray scheduling unit allocating a ray provided by the ray buffer to one of a plurality of T&I pipelines, each of which including an input and output buffers; a traversal/intersection test performing unit performing a traversal/intersection test on an allocated ray in a parallel fashion by using each of the plurality of T&I pipelines and determining a triangle intersecting the allocated ray; and a test result ordering unit receiving information about the triangle from the plurality of T&I pipelines as a test result, storing the received test result in a test buffer, and re-arranging the received test result according to a frame progress order.Type: GrantFiled: May 31, 2019Date of Patent: September 8, 2020Assignee: SILICONARTS, INC.Inventor: Hyung Min Yoon
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Patent number: 9024799Abstract: Data transmission apparatus and method thereof, and data reception apparatus and method thereof. Input data is encoded into a plurality of visual codes according to a visual code type. The visual code type includes a sequential type requiring sequential transmission and a nonsequential type not requiring sequential transmission. The sequential visual code includes start code, data code, and end code, and is displayed sequentially. The nonsequential visual code is displayed nonsequentially.Type: GrantFiled: May 25, 2012Date of Patent: May 5, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung-min Yoon, Chang-kyu Choi
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Network based real-time virtual reality input/output system and method for heterogeneous environment
Patent number: 8924985Abstract: A network based real-time virtual reality input/output system and method for a heterogeneous environment are provided. The virtual reality input/output system transfers data received from a plurality of virtual reality input device and a request from a plurality of virtual reality applications to at least one corresponding virtual reality data generator among a plurality of virtual reality data generators, and transfers virtual reality data, which is generated by processing data corresponding to the request among the received data by the at least one corresponding virtual reality data generator, to the virtual reality application which transmits the request.Type: GrantFiled: January 5, 2011Date of Patent: December 30, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Byung In Yoo, Hyung Min Yoon, Kyung Hwan Kim -
Publication number: 20140347355Abstract: A ray tracing core comprises a ray tracing unit (RTU), a control unit, and a tree build unit (TBU). The tree build unit (TBU) builds one selected of a plurality of spatial expression data structures. The ray tracing unit (RTU) performs ray tracing based on the spatial expression data structure which is selected. The control unit selects one of a plurality of spatial expression data by calculating an execution complexity of the ray tracing unit and the tree build unit.Type: ApplicationFiled: August 11, 2014Publication date: November 27, 2014Inventor: Hyung-min YOON
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Patent number: 8836702Abstract: A ray tracing core comprises a ray tracing unit (RTU), a control unit, and a tree build unit (TBU). The ray tracing unit performs ray tracing based on a spatial partitioning structure. The control unit calculates the degree of complexity of the spatial partitioning structure by monitoring the load state of the ray tracing unit. The tree build unit builds the spatial partitioning structure having the degree of complexity which is calculated. The load state is determined based on a frame rate which is processed in the pertinent unit. The spatial partitioning structure applies a K-dimensional tree. For example, the degree of complexity can be modified according to either the maximum primitive number of a leaf node with respect to a K-dimensional tree structure or a tree depth.Type: GrantFiled: February 18, 2011Date of Patent: September 16, 2014Assignees: Siliconarts Inc., Industry-Academia Cooperation Group of Sejong UniversityInventors: Hyung Min Yoon, Woo Chan Park
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Publication number: 20140176550Abstract: A method for selecting a MIP-map level is used for Texture Mapping based on Global Illumination. The method for selecting the MIP-map level confirms Object information on at least one object on a screen. The object information can include the number, shape, and the composition of objects on the screen, and/or the spatial position of a relevant object on the screen. Based on the object information, a MIP-map level selection algorithm is determined. The MIP-map level selection algorithm includes ray tracing and/or distance measuring, wherein the ray tracing selects the MIP-map based on the Differential value of adjacent rays, and the distance measuring can select a MIP-map by calculating the distance at which the ratio of pixels and texels reach 1:1. Based on the determined method, the MIP-map level is selected.Type: ApplicationFiled: August 27, 2010Publication date: June 26, 2014Applicants: INDUSTRY-ACADEMIA COOPERATION GROUP OF SEJONG UNIVERSITY, SILICONARTS INC.Inventors: Woo chan Park, Hyung min Yoon
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Patent number: 8692831Abstract: Provided is a parallel operation processing apparatus and method. The parallel operation processing apparatus and method may generate an interpolated matrix with respect to a character included in each of a current frame and a next frame using a matrix corresponding to each of the current frame and the next frame generated, based on joint information corresponding to a plurality of joints included in the character. Also, the parallel operation processing apparatus and method may display an interpolated frame using the interpolated matrix.Type: GrantFiled: June 28, 2010Date of Patent: April 8, 2014Assignees: Samsung Electronics Co., Ltd., Korea University of Technology and Education Industry-University Cooperation FoundationInventors: Hyung Min Yoon, Oh Young Kwon, Byung In Yoo, Chang Mug Lee, Hyo Seok Seo
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Publication number: 20130314420Abstract: A ray tracing core comprises a ray tracing unit (RTU), a control unit, and a tree build unit (TBU). The ray tracing unit performs ray tracing based on a special partitioning structure. The control unit calculates the degree of complexity of the spatial partitioning structure by monitoring the load state of the ray tracing unit. The tree build unit builds the spatial partitioning structure having the degree of complexity which is calculated. The load state is determined based on a frame rate which is processed in the pertinent unit. The spatial partitioning structure applies a K-dimensional tree. For example, the degree of complexity can be modified according to either the maximum primitive number of a leaf node with respect to a K-dimensional tree structure or a tree depth.Type: ApplicationFiled: February 18, 2011Publication date: November 28, 2013Applicants: INDUSTRY-ACADEMIA COOPERATION GROUP OF SEJONG UNIVERSITY, SILICONARTS INC.Inventors: Hyung Min Yoon, Woo Chan Park
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Patent number: 8576107Abstract: Data transmission apparatus and method thereof, and data reception apparatus and method thereof. Input data is encoded into a plurality of visual codes according to a visual code type. The visual code type includes a sequential type requiring sequential transmission and a nonsequential type not requiring sequential transmission. The sequential visual code includes start code, data code, and end code, and is displayed sequentially. The nonsequential visual code is displayed nonsequentially.Type: GrantFiled: September 24, 2009Date of Patent: November 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hyung-min Yoon, Chang-kyu Choi