Patents by Inventor Hyung-su Jeong

Hyung-su Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240286559
    Abstract: An embodiment mounting and demounting device for a wireless electronic device includes a pair of holder wings arranged symmetrically to each other and configured to press both sides of the wireless electronic device, a holder wing adjusting device configured to apply a force to adjust a gap between the holder wings using a driving force of a drive motor, a lifting implementing device configured to interlock with the holder wing adjusting device to lift the wireless electronic device upward in a case in which the holder wings are spread apart by a predetermined reference gap or more, a lower housing wrapped around a lower side of the holder wings, the holder wing adjusting device, and the lifting implementing device, and an upper housing coupled to an upper side of the lower housing and configured to allow the wireless electronic device to pass through in an up and down direction.
    Type: Application
    Filed: November 13, 2023
    Publication date: August 29, 2024
    Inventors: Guk Mu Park, Dong Woo Jeong, Dong Ho Kang, Jung Sang You, Hyung Joo Kim, Hyeong Jong Kim, Seung Min Jeong, Seung Young Lee, Byung Jin Son, Han Su Yoo, Hyo Seop Cha, Young Gyu Song, Yun Chang Kim, Jae Sik Choi, Dae Hee Lee, Byung Yong Choi, Seon Chae Na, Sang Do Park, Eun Sue Kim, Yong Seong Jang, Eom Seok Yoo, Seung Young Lee, Jin Wook Choi
  • Patent number: 9048210
    Abstract: A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: June 2, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-su Jeong, Jai-kwang Shin, Nam-young Lee, Ji-hoon Lee, Min-kwon Cho, Yong-cheol Choi, Hyuk-soon Choi
  • Patent number: 8963580
    Abstract: A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 24, 2015
    Assignees: Samsung Electronics Co., Ltd., University of Seoul Industry Cooperation Foundation
    Inventors: Hyun-sik Choi, Ho-jung Kim, Ki-chul Kim, Jai-kwang Shin, Joong-ho Choi, Hyung-su Jeong
  • Patent number: 8871544
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Young-soo Park, Su-hee Chae, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee
  • Patent number: 8716749
    Abstract: Substrate structures and methods of manufacturing the substrate structures. A substrate structure is manufactured by forming a protrusion area of a substrate under a buffer layer, and forming a semiconductor layer on the buffer layer, thereby separating the substrate from the buffer layer except in an area where the protrusion is formed. The semiconductor layer on the buffer layer not contacting the substrate has freestanding characteristics, and dislocation or cracks may be reduced and/or prevented.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee, Hyung-su Jeong
  • Patent number: 8703512
    Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: April 22, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-won Lee, Bok-ki Min, Jun-youn Kim, Young-jo Tak, Hyung-su Jeong
  • Publication number: 20140077388
    Abstract: A semiconductor device includes a device chip coupled to an electrode chip. The device chip includes a first device electrode on a first substrate, and the electrode chip includes a first pad electrode extending at least partially through a second substrate. The first pad electrode is electrically connected to the first device electrode and includes spaced conductive sections which serve as a heat dissipating structure to transfer heat received from the device chip and the electrode chip. A method for making a semiconductor device includes using the substrate of the electrode chip as a support during thinning the substrate of the device chip.
    Type: Application
    Filed: January 25, 2013
    Publication date: March 20, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hong-Pyo HEO, Young-soo KWON, Jai-kwang SHIN, Young-tek OH, Hyung-su JEONG
  • Publication number: 20140057381
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Application
    Filed: October 30, 2013
    Publication date: February 27, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su JEONG, Young-soo PARK, Su-hee CHAE, Bok-ki MIN, Jun-youn KIM, Hyun-gi HONG, Young-jo TAK, Jae-won LEE
  • Patent number: 8604827
    Abstract: The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: December 10, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Ho-jung Kim, Hyun-sik Choi
  • Patent number: 8592839
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Young-soo Park, Su-hee Chae, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee
  • Publication number: 20130309794
    Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.
    Type: Application
    Filed: July 25, 2013
    Publication date: November 21, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-won LEE, Bok-Ki MIN, Jun-youn KIM, Young-jo TAK, Hyung-su JEONG
  • Patent number: 8525201
    Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: September 3, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-won Lee, Bok-ki Min, Jun-youn Kim, Young-jo Tak, Hyung-su Jeong
  • Publication number: 20130200427
    Abstract: A transistor includes a device portion and a collector layer. The device portion is in a first side of a semiconductor substrate, and includes a gate and an emitter. The collector layer is on a second side of the semiconductor substrate, which is opposite to the first side. The collector layer is an impurity-doped epitaxial layer and has a doping profile with a non-normal distribution.
    Type: Application
    Filed: July 16, 2012
    Publication date: August 8, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-su Jeong, Jai-kwang Shin, Nam-young Lee, Ji-hoon Lee, Min-kwon Cho, Yong-cheol Choi, Hyuk-soon Choi
  • Patent number: 8503220
    Abstract: In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-jung Kim, Jai-kwang Shin, Hyun-sik Choi, Hyung-su Jeong
  • Patent number: 8477055
    Abstract: A digital-to-analog converter (DAC) includes: a plurality of first controllers and a plurality of resistor devices. The plurality of first controllers are configured to be selectively switched on according to a received digital signal to control an analog signal according to the received digital signal. The plurality of resistor devices are respectively connected to the plurality of first controllers. The plurality of resistor devices include non-volatile memory devices.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: July 2, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-sik Choi, Ho-jung Kim, Hyung-su Jeong
  • Publication number: 20130049802
    Abstract: A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.
    Type: Application
    Filed: August 29, 2012
    Publication date: February 28, 2013
    Applicants: University of Seoul Industry Cooperation Foundation, Samsung Electronics Co., Ltd.
    Inventors: Hyun-sik CHOI, Ho-jung KIM, Ki-chul KIM, Jai-kwang SHIN, Joong-ho CHOI, Hyung-su JEONG
  • Publication number: 20120212255
    Abstract: The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value.
    Type: Application
    Filed: September 23, 2011
    Publication date: August 23, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-su Jeong, Ho-jung Kim, Hyun-sik Choi
  • Patent number: 8222663
    Abstract: Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer formed of a metal between a semiconductor layer and a bonding substrate. When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: July 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-kook Kim, Su-hee Chae, Young-soo Park, Taek Kim, Moon-seung Yang, Hyung-su Jeong, Jae-chul Park, Jun-youn Kim
  • Publication number: 20120140545
    Abstract: In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.
    Type: Application
    Filed: September 15, 2011
    Publication date: June 7, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-jung Kim, Jai-kwang Shin, Hyun-sik Choi, Hyung-su Jeong
  • Publication number: 20120133538
    Abstract: A digital-to-analog converter (DAC) includes: a plurality of first controllers and a plurality of resistor devices. The plurality of first controllers are configured to be selectively switched on according to a received digital signal to control an analog signal according to the received digital signal. The plurality of resistor devices are respectively connected to the plurality of first controllers. The plurality of resistor devices include non-volatile memory devices.
    Type: Application
    Filed: June 10, 2011
    Publication date: May 31, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-sik Choi, Ho-jung Kim, Hyung-su Jeong