Abstract: Provided is a display device including a display panel, an optical sensor, a timing controller, a scan driver, a data driver, and an image controller. The timing controller controls an image refresh rate of the display panel based on a refresh rate control signal. Thus, the display device provides improved visibility.

Abstract: Provided are a compound capable of improving the light-emitting efficiency, stability, and lifespan of an element; an organic electronic element using same; and an electronic device thereof.

Abstract: The present disclosure relates to an apparatus for fabricating a display panel including: an attachment member having a fixing portion in a pressurization direction to which a pressurization header is fixed, an attachment driving member configured to move the attachment member and the pressurization header in the pressurization direction or a detachment direction through a fixing frame of the attachment member, a first pressure sensing module between the pressurization header and the attachment member and configured to generate first pressure detection signals according to pressure applied to the pressurization header, a gradient setting module configured to set a gradient of the pressurization header based on magnitudes of the first pressure detection signals, and a gradient control module configured to adjust gradients of the pressurization header, the attachment member, and the fixing frame according to control of the gradient setting module.

Abstract: Proposed is a CO2-reduction membrane electrode assembly (MEA), which is a novel MEA capable of changing a reaction condition to an alkaline condition from a problematic acidic condition unfavorable to reactions on a cathode side during catalytic reactions using a cation exchange membrane (CEM) as a separator. In addition, the MEA can reduce a hydrogen evolution reaction (HER), which is a side reaction. In addition, a method of manufacturing the MEA, and a CO2-reduction assembly including the MEA are also proposed.

Abstract: A laminate can comprise an oxide disposed over a first major surface of a substrate. The oxide layer can comprise a thickness of about 40 nanometers or less. The oxide layer can comprise oxygen and a first element. The first element can comprise at least one of titanium, tantalum, silicon, or aluminum. The oxide layer can comprise an atomic ratio of oxygen to the another element of about 1.5 or less. The laminate can comprise a peel strength between the substrate and the oxide layer of about 1.3 Newtons per centimeter or more. Methods of making a laminate can comprise providing a substrate comprising a first major surface and depositing an oxide layer over the first major surface of the substrate by sputtering from an elemental target comprising an another element in an oxygen environment.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A semiconductor device includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern, a gate structure on the lower pattern and having a gate electrode and a gate insulating film that surround each of the sheet patterns, a gate capping pattern on the gate structure, a gate etching stop pattern between the gate capping pattern and the gate structure, a gate spacer along a sidewall of the gate capping pattern, a source/drain pattern on the gate structure, a gate contact through the gate capping pattern and connected to the gate electrode, upper surfaces of the gate contact and gate spacer being coplanar, and a source/drain contact on the source/drain pattern and connected to the source/drain pattern.

Abstract: The inventive concept provides an inkjet printing method. The inkjet printing method for discharging an ink on a substrate using a head having a plurality of nozzles formed thereon includes determining a grade of nozzles by measuring a discharge performance of the nozzles, which is a grading step; selecting a use nozzle that can participate in printing the substrate among the nozzles based on the grade determined at the grading step, which is a nozzle selecting step; and discharging the ink on the substrate using at least one nozzle among use nozzles, which is a printing step.

Abstract: A semiconductor device including a substrate; first and second active patterns on the substrate, extending in a first direction and spaced apart in a second direction; gate electrodes on the first and second active patterns and extending in the second direction; a first gate separation structure between the first and second active patterns, extending in the first direction, and separating the gate electrodes; and a first element separation structure between the gate electrodes, extending in the second direction, and separating the second active pattern, wherein a distance to a first side of a first portion of the first gate separation structure is smaller than a distance to the first side of a second portion of the first gate separation structure, and a distance to the second side of the first portion is smaller than a distance from the second active pattern to the second side of the second portion.

Abstract: An electrochemical electrode according to the present invention may prevent agglomeration and desorption of a catalyst even when a catalyst in a particle form is used, because a protective layer containing hydrogel is used, such that stability may be secured, thereby implementing an electrode having a long duration.

Abstract: The present invention relates to an acoustic wave transmission device for moving a fluid or fine particles inside the fluid to a desired position using acoustic waves, and more particularly, to an acoustic wave transmission device including an acoustic wave transmission medium that minimizes acoustic wave interference due to the acoustic wave transmission medium by reducing reflection and refraction that may be generated when acoustic waves pass through the acoustic wave transmission medium in which a fluid is accommodated, and a manufacturing method of the acoustic wave transmission medium.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

Abstract: A method for fabricating an electronic device including a semiconductor memory includes forming a chalcogenide layer, forming a first conductive layer on the chalcogenide layer, and increasing a density of an interface between the chalcogenide layer and the first conductive layer by injecting or irradiating ions onto the interface.

Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.

Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.

Abstract: A semiconductor device includes a first semiconductor pattern doped with first impurities on a substrate, a first channel pattern on the first semiconductor pattern, second semiconductor patterns doped with second impurities contacting upper edge surfaces, respectively, of the first channel pattern, and a first gate structure surrounding at least a portion of a sidewall of the first channel pattern.

Abstract: A semiconductor device including a first fin type pattern and a second fin type pattern which protrude from a substrate and are spaced apart from each other to extend in a first direction, a dummy fin type pattern protruding from the substrate between the first fin type pattern and the second fin type pattern, a first gate structure extending in a second direction intersecting with the first direction, on the first fin type pattern, a second gate structure extending in the second direction, on the second fin type pattern, and a capping pattern extending in the second direction, on the first gate structure and the second gate structure, wherein the capping pattern includes a separation part which is in contact with an upper surface of the dummy fin type pattern, and the dummy fin type pattern and the separation part separate the first gate structure and the second gate structure.

Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes stack structures, a gap-fill layer filling spaces between the stack structures, and nanopores located in the gap-fill layer. Each of the stack structures includes a memory pattern. The nanopores are distributed in a portion of the gap-fill layer that is located at a level corresponding to where the memory pattern is located in each of the stack structures.