Abstract: A magnetoresistance memory device includes a lower electrode, a barrier layer, a variable resistance layer, an upper electrode, and a first layer stack. The lower electrode contains one of amorphous carbon and amorphous carbon nitride. The barrier layer is provided on the lower electrode and contains one of tungsten nitride (WN) and silicon tungsten nitride (WSiN). The variable resistance layer is provided on the barrier layer and contains a variable resistance material. The upper electrode is provided on the variable resistance layer and contains one of amorphous carbon and amorphous carbon nitride. The first layer stack is provided on the upper electrode and includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer.

Abstract: A method of manufacturing an OTS device of the invention is a method of manufacturing OTS device including a first conductor, an OTS portion made of chalcogenide, and a second conductor which are layered in order and disposed on an insulating substrate. The manufacturing method includes: a step D of forming a resist so as to coat part of an upper surface of the second conductor; a step E of dry etching a region which is not coated with the resist; and a step F of ashing the resist. In the step E, the second conductor, all of the OTS portion, and an upper portion of the first conductor are removed by an etching treatment once in a depth direction of the region.

Abstract: A method of manufacturing an OTS device of the invention is a method of manufacturing OTS device including a first conductor, an OTS portion made of chalcogenide, and a second conductor which are layered in order and disposed on an insulating substrate. The manufacturing method includes: a step D of forming a resist so as to coat part of an upper surface of the second conductor; a step E of dry etching a region which is not coated with the resist; and a step F of ashing the resist. In the step E, the second conductor, all of the OTS portion, and an upper portion of the first conductor are removed by an etching treatment once in a depth direction of the region.

Abstract: Disclosed is a method for manufacturing a chalcogenide switching device, which includes forming a first electrode on a substrate, forming a chalcogenide material composed of Gex and Se1-x formed on the first electrode, and forming a second electrode on the chalcogenide material, wherein the value x is greater than 0 and smaller than 1. A chalcogenide switching device manufactured by this method is also disclosed.

Abstract: Disclosed is a method for manufacturing a chalcogenide switching device includes forming a first electrode on a SOI substrate, forming a chalcogenide material composed of Gex and Se1-x formed on the first electrode, and forming a second electrode on the chalcogenide material, wherein the value x is greater than 0 and smaller than 1. A chalcogenide switching device manufactured by this method is also disclosed.