Patents by Inventor Hyung-dal KWON

Hyung-dal KWON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250086476
    Abstract: A method for performing a genetic algorithm is performed by one or more processors, and the method includes: generating a subset of elements by using a neural network from a population including elements that each correspond to a respective solution to a problem; generating child elements by performing a genetic algorithm on the subset; and determining that one of the child elements, from among the child elements is an answer to the problem.
    Type: Application
    Filed: September 9, 2024
    Publication date: March 13, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Youngmin OH, Hyung-dal KWON, Bosun HWANG
  • Publication number: 20250086477
    Abstract: A method is performed by one or more processors, and the method includes: receiving a problem definition for which an optimized solution is to be determined; executing a genetic algorithm to determine the optimized solution, the executing the genetic algorithm including iteratively performing, according to changing values of a control parameter, a genetic operation on a population of elements while evaluating elements of the population against the problem definition, the control parameter being a hyperparameter of the genetic operations; based on results of the respective iterations of the genetic operation to a neural network, generating, by a neural network, the values of the control parameter; and determining the optimized solution based on the iterations of the genetic operation as controlled, via the values of the control parameter, by the neural network.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 13, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Dal KWON, Youngmin OH, Doyun KIM, Yoonhyeok LEE, Bosun HWANG
  • Patent number: 12236336
    Abstract: Disclosed is a method and apparatus with deep learning operations. A deep learning apparatus includes a processor, configured to support a plurality of different operation modes, including a systolic array having a plurality of multiplier accumulator (MAC) units, and a control circuit configured to respectively control, for each the plurality of different operation modes, select operations of the plurality of MAC units and data movements among the plurality of MAC units.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: February 25, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-Dal Kwon
  • Patent number: 12175299
    Abstract: A computing device and method is disclosed. The computing device includes a plurality of processing cores, and a tile scheduler configured to update a cost matrix of each of the plurality of processing cores based on meta information of each of first tiles previously allocated to the plurality of processing cores and meta information of each of second tiles, and allocate the second tiles with respect to the plurality of processing cores using the updated cost matrix of each of the plurality of processing cores.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: December 24, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Eon Jo, Hyung-Dal Kwon, Hanmin Park, Jaehyeong Sim, Seung Wook Lee
  • Patent number: 12130756
    Abstract: An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: October 29, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hanmin Park, Hyung-Dal Kwon, Jaehyeong Sim, Seungwook Lee, Jae-Eon Jo
  • Publication number: 20240232498
    Abstract: An apparatus with circuit designing may include: one or more processors configured to: generate an initial solution set based on nodes and edges comprised in a graph corresponding to a circuit to be optimized; generate a crossover solution by performing a crossover operation based on a plurality of solutions comprised in the initial solution set; perform a first change of positions of nodes comprised in the crossover solution by performing a mutation operation on the crossover solution; and generate a target circuit structure by performing a second change of the positions of the first changed nodes based on lengths of the edges connecting the nodes.
    Type: Application
    Filed: July 11, 2023
    Publication date: July 11, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-Dal KWON, Youngmin OH, Bosun HWANG
  • Patent number: 11995417
    Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.
    Type: Grant
    Filed: June 27, 2023
    Date of Patent: May 28, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Nam Hwang, Hyung-Dal Kwon, Dae Hyun Kim
  • Patent number: 11960855
    Abstract: Disclosed is an apparatus and method for performing deep learning operations. The apparatus includes a systolic array comprising multiplier accumulator (MAC) units, and a control circuit configured to control an operation of a multiplexer connected to at least one of the MAC units and operations of the MAC units according to a plurality of operation modes.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: April 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Dal Kwon, Hanmin Park, Seungwook Lee, Jae-Eon Jo
  • Publication number: 20240078361
    Abstract: A method of generating a circuit design parameter meeting a target specification, the method including generating a first probability distribution of a first specification using a first model provided a first parameter where the first model is configured to infer a correlation between the first parameter and the first probability distribution, generating a second parameter using a second model provided the first probability distribution, and updating the first model based on the second parameter.
    Type: Application
    Filed: May 2, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngmin OH, Doyun KIM, Hyung-Dal KWON, Yongwoo LEE, Bosun HWANG
  • Publication number: 20240061972
    Abstract: An apparatus for modelling a computing system including a processor configured to generate a plurality of classes related to properties of a computing system based on received information related to a first hardware of the computing system, generate a profile result based on the plurality of classes, and predict a performance of second hardware in the computing system in place of the first hardware, the prediction being based on the profile result.
    Type: Application
    Filed: March 10, 2023
    Publication date: February 22, 2024
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
    Inventors: Hyung-Dal KWON, Byeonghyun KO, Seongbeom KIM, Jaejin LEE, Gyeongje CHO
  • Publication number: 20240054024
    Abstract: An apparatus with computing system control includes: a receiver configured to receive an operation mode for controlling a plurality of components constituting a computing system; and a processor configured to: determine a parameter for controlling the plurality of components based on the operation mode, a time limit for processing an operation of the plurality of components, and an operation time of the plurality of components; distribute a workload for the plurality of components based on the parameter; and process the operation based on the distributed workload.
    Type: Application
    Filed: January 30, 2023
    Publication date: February 15, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung-Dal KWON, Seongbeom KIM
  • Patent number: 11899741
    Abstract: A memory device includes a memory configured to store input data and filter data for a convolution operation, and a function processor configured to, in response to a read command of at least a portion of data from among the input data and the filter data, transform the at least a portion of the data based on a parameter of the convolution operation during a clock cycle corresponding to the read command and output a corresponding transformation result as transformed data.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: February 13, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Dal Kwon, Seung Wook Lee
  • Patent number: 11886887
    Abstract: An operating method of an electronic device including controllers includes updating, by a first-level controller of the controllers, a first-level firmware of the the first-level controller, writing, by the first-level controller, a second-level firmware to one of second-level controllers of the controllers having a lower level than the first-level controller, booting, by the one of the second-level controllers, by performing a reset operation, verifying, by the first-level controller or the booted second-level controller, whether there is a target second-level controller with out-of-date firmware, and writing, by the first-level controller or the booted second-level controller in response to a result of the verifying, the second-level firmware to the target second-level controller.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: January 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sunghoon Son, Hyung-Dal Kwon
  • Publication number: 20240004809
    Abstract: An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
    Type: Application
    Filed: August 3, 2023
    Publication date: January 4, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hanmin PARK, Hyung-Dal KWON, Jaehyeong SIM, Seungwook LEE, Jae-Eon JO
  • Publication number: 20230342113
    Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Young Nam HWANG, Hyung-Dal KWON, Dae Hyun KIM
  • Patent number: 11790232
    Abstract: A neural network deep learning data control apparatus includes: a memory; an encoding circuit configured to receive a data sequence, generate a compressed data sequence in which consecutive invalid bits in a bit string of the data sequence are compressed into a single bit of the compressed data sequence, generate a validity determination sequence indicating a valid bit and an invalid bit in a bit string of the compressed data sequence, and write the compressed data sequence and the validity determination sequence to the memory; and a decoding circuit configured to read the compressed data sequence and the validity determination sequence from the memory, and determine a bit in the bit string of the compressed data sequence set for transmission to a neural network circuit, based on the validity determination sequence, such that the neural network circuit omits an operation with respect to non-consecutive invalid bits.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: October 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-Dal Kwon
  • Patent number: 11741026
    Abstract: An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: August 29, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hanmin Park, Hyung-Dal Kwon, Jaehyeong Sim, Seungwook Lee, Jae-Eon Jo
  • Patent number: 11733968
    Abstract: Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Nam Hwang, Hyung-Dal Kwon, Dae Hyun Kim
  • Patent number: 11681354
    Abstract: An operating method of a power optimization scheduler is provided, where the operating method of a power optimization scheduler includes obtaining information regarding a neural network (NN) model, determining a voltage value for a task to be performed by at least one processing device, based on the obtained information regarding the NN model, and controlling a power management device to apply a voltage corresponding to the determined voltage value to the at least one processing device.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: June 20, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byungwoo Bang, Hyung-Dal Kwon
  • Publication number: 20230107333
    Abstract: A computing method and device for large-scale computing is provided. The computing device includes at least one processing device configured to perform an operation related to a neural network, a sensor configured to sense an electrical characteristic of the at least one processing device, an operating frequency of the at least one processing device, and a temperature of the at least one processing device, and a processor configured to calculate a workload to be allocated to the at least one processing device based on an operating mode of the at least one processing device, the electrical characteristic of the at least one processing device, the operating frequency of the at least one processing device, and the temperature of the at least one processing device, and control the electrical characteristic, the operating frequency, and the temperature based on the operating mode and the workload.
    Type: Application
    Filed: September 1, 2022
    Publication date: April 6, 2023
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
    Inventors: HYUNG-DAL KWON, Jaejin Lee, Jinpyo Kim, BYUNGWOO BANG, Heehoon Kim, Daeyoung Park, SUNGHOON SON, SEUNG WOOK LEE, WOOSEOK CHANG, Wookeun Jung, JAE HOON JUNG, Jae-Eon Jo