Abstract: A semiconductor device includes a first transistor on a first region of a substrate, and a second transistor on a second region of the substrate. The first transistor includes a first gate insulating layer including a first interfacial insulating layer, a first lower high-? dielectric layer, and a first composite dielectric layer, sequentially stacked on each of first semiconductor channel layers. The second transistor includes a second gate insulating layer including a second interfacial insulating layer, a second lower high-? dielectric layer, a second composite dielectric layer, and a second upper high-? dielectric layer, sequentially stacked on each of second semiconductor channel layers. The first and the second lower high-? dielectric layers include a first metal element, the second upper high-? dielectric layer includes a second metal element, and the first and the second composite dielectric layers include both of the first and the second metal elements.

Abstract: A display device includes: a substrate; a thin-film transistor on the substrate; and a light-emitting diode electrically connected to the thin-film transistor, wherein the thin-film transistor includes: a semiconductor layer in which a source region, a drain region, and a channel region are defined; a gate electrode insulated from the semiconductor layer and overlapping the semiconductor layer; a source electrode electrically connected to the source region; and a drain electrode electrically connected to the drain region, wherein the semiconductor layer includes a crystallized metal chalcogenide including a transition metal and a chalcogen element and has a layered structure.

Abstract: A semiconductor device includes a vertical pattern including a first source/drain region, a second source/drain region having a height higher than a height of the first source/drain region, and a vertical channel region between the first and second source/drain regions, a gate structure facing a first side surface of the vertical pattern, and a back gate structure facing a second side surface, opposite to the first side surface of the vertical pattern. The gate structure includes a gate electrode on the first side surface of the vertical pattern, and a gate dielectric layer including a portion disposed between the vertical pattern and the gate electrode. The back gate structure includes a back gate electrode on the second side surface of the vertical pattern, and a dielectric structure including a portion disposed between the vertical pattern and the back gate electrode. The dielectric structure includes an air gap.

Abstract: A semiconductor device includes a substrate, a first gate structure and a second gate structure on the substrate, a single back gate structure between the first gate structure and the second gate structure, a first structure including a first vertical channel region extending in a vertical direction, at least a portion of the first vertical channel region between the first gate structure and the single back gate structure, and a second structure including a second vertical channel region extending in the vertical direction. The second structure is spaced apart from the first structure, and at least a portion of the second vertical channel region is between the second gate structure and the single back gate structure.

Abstract: A semiconductor device may include a substrate including a memory cell region between a first connection region and a second connection region, gate electrodes extending in a first direction and including first pad regions having a step structure on the first connection region, back gate electrodes between the gate electrodes and extending in a direction opposite the first direction, vertical conductive patterns extending in a vertical direction and spaced apart from each other in the first direction on the memory cell region of the substrate, and active layers between the gate electrodes and the back gate electrodes on the memory cell region of the substrate. The active layers may extend in a second direction, intersecting the first direction, and may be electrically connected to the vertical conductive patterns. The back gate electrodes may include second pad regions having a step structure on the second connection region.

Abstract: An integrated circuit device includes: a substrate including active regions; a device isolation film defining the active regions; a word line arranged over the active regions and the device isolation film and extending in a first horizontal direction; and a gate dielectric film arranged between the substrate and the word line and between the device isolation film and the word line, in which, in a second horizontal direction orthogonal to the first horizontal direction, a width of a second portion of the word line over the device isolation film is greater than a width of a first portion of the word line over the active regions. To manufacture the integrated circuit device, an impurity region is formed in the substrate and the device isolation film by implanting dopant ions into the substrate and the device isolation film, and a thickness of a portion of the impurity region is reduced.

Abstract: An electrolyte solution for a lithium-sulfur battery including: a lithium salt, which includes an anion having a donor number of 15 kcal/mol of more, and a non-aqueous solvent, and a lithium-sulfur battery including the same.

Abstract: An integrated circuit device includes: a substrate including active regions; a device isolation film defining the active regions; a word line arranged over the active regions and the device isolation film and extending in a first horizontal direction; and a gate dielectric film arranged between the substrate and the word line and between the device isolation film and the word line, in which, in a second horizontal direction orthogonal to the first horizontal direction, a width of a second portion of the word line over the device isolation film is greater than a width of a first portion of the word line over the active regions. To manufacture the integrated circuit device, an impurity region is formed in the substrate and the device isolation film by implanting dopant ions into the substrate and the device isolation film, and a thickness of a portion of the impurity region is reduced.