Patents by Inventor Hyungmo Yoo

Hyungmo Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7212072
    Abstract: A power amplifier includes larger size transistors to provide higher power gain at lower frequencies. Transistors of transistor unit cells include a horseshoe-shaped emitter and a strip-shaped base to increase gain. Transistors are combined at a first level to form transistor arrays, which are combined with bonding wires at a second level to an output micro strip transmission line. A Vbe referenced bias circuit may include a smart function to lower quiescent current.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: May 1, 2007
    Assignee: Dynalinear Technologies, Inc.
    Inventors: Reza Esfandiari, Nam-Min Cho, Alzon B. Canilao, Ron Green, Hyungmo Yoo
  • Patent number: 7026876
    Abstract: A power amplifier includes larger size transistors to provide higher power gain at lower frequencies. Transistors of transistor unit cells include a horseshoe-shaped emitter and a strip-shaped base to increase gain. Transistors are combined at a first level to form transistor arrays, which are combined with bonding wires at a second level to an output micro strip transmission line. A Vbe referenced bias circuit may include a smart function to lower quiescent current.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: April 11, 2006
    Assignee: Dynalinear Technologies, Inc.
    Inventors: Reza Esfandiari, Nam-Min Cho, Alzon B. Canilao, Ron Green, Hyungmo Yoo
  • Patent number: 5817179
    Abstract: An improved gallium arsenide anneal boat and method for annealing comprises a slot structure for holding a wafer-stack of first and second GaAs wafers and a silicon wafer in the slot structure prior to annealing. The silicon wafer is tightly held in a central slot to maintain a vertical position and the GaAs wafers are loosely held in outside slots to avoid the formation of slip lines. The GaAs wafers slightly adhere to the silicon wafer to maintain a vertical position to avoid bending. Additionally, the wafer-stacks are separated by more than about 1.25 inches and processed in arsine gas at about 1 atm. pressure to avoid hazing.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: October 6, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gi Choi, Hyungmo Yoo