Patents by Inventor HYUN-JONG MOON

HYUN-JONG MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240323213
    Abstract: An apparatus for deriving a threat level of data according to an embodiment of the present disclosure includes a first scanning unit configured to confirm network information including host information and information about one or more services included in a server, a second scanning unit configured to confirm data disclosed on the server and generate a plurality of data sets by combining at least one of the confirmed data and pre-stored words, and a threat level analysis unit configured to analyze the threat level based on the network information and the plurality of data sets.
    Type: Application
    Filed: December 18, 2023
    Publication date: September 26, 2024
    Applicant: S2W INC.
    Inventors: Jong Heon YANG, Hyung Suk KIM, Hyun Jong MOON, Ja II JO, Sang Duk SUH, Jae Ki KIM
  • Publication number: 20240087991
    Abstract: A semiconductor package including a die paddle, a first lead spaced apart from the die paddle and on one side of the die paddle, a second lead spaced apart from the die paddle and on another side of the die paddle, a spacer on the die paddle, a semiconductor die on the spacer, a first wire configured to connect an upper surface of the semiconductor die to the first lead, and a mold film configured to cover the die paddle, the first lead, the second lead, the spacer, the semiconductor die, and the first wire, wherein a first width of the spacer is greater than a second width of the die paddle so that the spacer overlaps the first lead may be provided.
    Type: Application
    Filed: June 30, 2023
    Publication date: March 14, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae Hyun LIM, Sung Woo PARK, Hyun Jong MOON, Kwang Jin LEE
  • Patent number: 9627126
    Abstract: A printed circuit board (PCB) includes an insulating substrate, a plurality of copper foil pattern layers and a plurality of insulating adhesive sheets sequentially stacked on an upper side of the insulating substrate and a lower side of the insulating substrate, an inductor included in the copper foil pattern layer disposed on the upper side of the insulating substrate, a grounding element included in the copper foil pattern layer disposed on the lower side of the insulating substrate, and a single through hole penetrating the insulating substrate and the insulating adhesive sheets. The single through hole is disposed between the inductor and the grounding element.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: April 18, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Jong Moon, Bok-Sik Myung, Seong-Ho Shin
  • Publication number: 20140362551
    Abstract: A printed circuit board (PCB) includes an insulating substrate, a plurality of copper foil pattern layers and a plurality of insulating adhesive sheets sequentially stacked on an upper side of the insulating substrate and a lower side of the insulating substrate, an inductor included in the copper foil pattern layer disposed on the upper side of the insulating substrate, a grounding element included in the copper foil pattern layer disposed on the lower side of the insulating substrate, and a single through hole penetrating the insulating substrate and the insulating adhesive sheets. The single through hole is disposed between the inductor and the grounding element.
    Type: Application
    Filed: April 17, 2014
    Publication date: December 11, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: HYUN-JONG MOON, Bok-Sik Myung, Seong-Ho Shin